R5F21265SDFP#U0 Renesas Electronics America, R5F21265SDFP#U0 Datasheet - Page 456
R5F21265SDFP#U0
Manufacturer Part Number
R5F21265SDFP#U0
Description
IC R8C/26 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/26r
Datasheet
1.R5F21272SDFPU0.pdf
(487 pages)
Specifications of R5F21265SDFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21265SDFP#U0R5F21265SDFP#V2
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
21.3.4
21.3.4.1
21.3.4.2
Timer RE has the TSTART bit for instructing the count to start or stop, and the TCSTF bit, which indicates
count start or stop. Bits TSTART and TCSTF are in the TRECR1 register.
Timer RE starts counting and the TCSTF bit is set to 1 (count starts) when the TSTART bit is set to 1 (count
starts). It takes up to 2 cycles of the count source until the TCSTF bit is set to 1 after setting the TSTART bit to
1. During this time, do not access registers associated with timer RE
Also, timer RE stops counting when setting the TSTART bit to 0 (count stops) and the TCSTF bit is set to 0
(count stops). It takes the time for up to 2 cycles of the count source until the TCSTF bit is set to 0 after setting
the TSTART bit to 0. During this time, do not access registers associated with timer RE other than the TCSTF
bit.
NOTE:
Write to the following registers or bits when timer RE is stopped.
Timer RE is stopped when bits TSTART and TCSTF in the TRECR1 register are set to 0 (timer RE stopped).
Also, set all above-mentioned registers and bits (immediately before timer RE count starts) before setting the
TRECR2 register.
Figure 21.4 shows a Setting Example in Real-Time Clock Mode.
• Registers TRESEC, TREMIN, TREHR, TREWK, and TRECR2
• Bits H12_H24, PM, and INT in TRECR1 register
• Bits RCS0 to RCS3 in TRECSR register
Sep 26, 2008
1. Registers associated with timer RE: TRESEC, TREMIN, TREHR, TREWK, TRECR1, TRECR2, and
Notes on Timer RE
Starting and Stopping Count
Register Setting
Page 437 of 453
TRECSR.
(1)
other than the TCSTF bit.
21. Usage Notes
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