MC908LJ24CPBE Freescale Semiconductor, MC908LJ24CPBE Datasheet - Page 187

IC MCU 24K FLASH 8MHZ SPI 64LQFP

MC908LJ24CPBE

Manufacturer Part Number
MC908LJ24CPBE
Description
IC MCU 24K FLASH 8MHZ SPI 64LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LJ24CPBE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
40
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
HC08LJ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Operating Supply Voltage
3.3 V, 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
6-ch x 10-bit
Controller Family/series
HC08
No. Of I/o's
40
Ram Memory Size
768Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908LJ24CPBE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC908LJ24CPBER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
10.6.6 MON_LDRNGE
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
In monitor mode, LDRNGE is used to load the data array in RAM with
data from a range of FLASH locations.
The MON_LDRNGE routine is designed to be used in monitor mode. It
performs the same function as the LDRNGE routine (see
LDRNGE), except that MON_LDRNGE returns to the main program via
an SWI instruction. After a MON_LDRNGE call, the SWI instruction will
return the control back to the monitor code.
Routine Name
Routine Description
Calling Address
Stack Used
Data Block Format
Monitor ROM (MON)
Table 10-16. ICP_LDRNGE Routine
MON_LDRNGE
Loads data from a range of locations, in monitor mode
$FF24
11 bytes
Bus speed
Data size
Starting address (high byte)
Starting address (low byte)
Data 1
Data N
:
ROM-Resident Routines
Monitor ROM (MON)
10.6.3
Data Sheet
187

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