MC908LJ24CPBE Freescale Semiconductor, MC908LJ24CPBE Datasheet - Page 432

IC MCU 24K FLASH 8MHZ SPI 64LQFP

MC908LJ24CPBE

Manufacturer Part Number
MC908LJ24CPBE
Description
IC MCU 24K FLASH 8MHZ SPI 64LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LJ24CPBE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
40
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
HC08LJ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Operating Supply Voltage
3.3 V, 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
6-ch x 10-bit
Controller Family/series
HC08
No. Of I/o's
40
Ram Memory Size
768Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908LJ24CPBE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC908LJ24CPBER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Break Module (BRK)
23.6.2 Break Address Registers
23.6.3 SIM Break Status Register
Data Sheet
432
Address:
Address:
BRKA — Break Active Bit
The break address registers (BRKH and BRKL) contain the high and low
bytes of the desired breakpoint address. Reset clears the break address
registers.
The SIM break status register (SBSR) contains a flag to indicate that a
break caused an exit from wait mode. The flag is useful in applications
requiring a return to wait mode after exiting from a break interrupt.
Reset:
Reset:
Read:
Write:
Read:
Write:
This read/write status and control bit is set when a break address
match occurs. Writing a logic 1 to BRKA generates a break interrupt.
Clear BRKA by writing a logic 0 to it before exiting the break routine.
Reset clears the BRKA bit.
1 = (When read) Break address match
0 = (When read) No break address match
$FE0C
$FE0D
Figure 23-4. Break Address Register High (BRKH)
Bit 15
Figure 23-5. Break Address Register Low (BRKL)
Bit 7
Bit 7
Bit 7
0
0
Break Module (BRK)
14
6
0
6
6
0
13
5
0
5
5
0
12
4
0
4
4
0
MC68HC908LJ24/LK24 — Rev. 2.1
11
3
0
3
3
0
Freescale Semiconductor
10
2
0
2
2
0
9
1
0
1
1
0
Bit 0
Bit 8
Bit 0
Bit 0
0
0

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