D13002F16V Renesas Electronics America, D13002F16V Datasheet - Page 257
D13002F16V
Manufacturer Part Number
D13002F16V
Description
IC H8/3002 ROMLESS 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.D13002F16V.pdf
(702 pages)
Specifications of D13002F16V
Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, PWM, WDT
Number Of I /o
38
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D13002F16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Table 9-1 Port Functions (cont)
Port
Port A
Port B
Description
• 8-bit I/O port
• Schmitt inputs
• 8-bit I/O port
• Can drive LEDs
• PB
have Schmitt
inputs
3
to PB
0
Pins
PA
PA
PA
PA
PA
PA
PA
PA
PB
PB
PB
PB
PB
PB
PB
PB
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
/TP
/TP
/TP
/TP
/TP
/TP
/TP
/TP
/TP
/TP
/TP
/TP
/TP
/TP
/TP
/TP
7
6
5
4
3
2
1
0
15
14
13
12
11
10
9
8
/TIOCB
/TIOCA
/TIOCB
/TIOCA
/TIOCB
/TIOCA
/TEND
/TEND
/TIOCB
/TIOCA
/TIOCB
/DREQ
/DREQ
/TOCXB
/TOCXA
/TIOCA
1
0
2
2
1
1
0
0
/TCLKB
/TCLKA
3
3
1
0
/A
/A
/A
/A
/TCLKD
/TCLKC
4
4
/ADTRG
241
4
4
20
21
22
23
Mode 1 Mode 2 Mode 3 Mode 4
Output (TP
programmable
timing pattern
controller (TPC),
input or output
(TIOCB
integrated timer
unit (ITU), and
generic input/output
TPC output
(TP
input and output
(TIOCA
TIOCA
generic input/
output
TPC output (TP
(TEND
controller (DMAC), ITU input and output
(TCLKD, TCLKC, TCLKB, TCLKA,
TIOCB
input/output
TPC output (TP
(DREQ
input (ADTRG) to A/D converter, ITU
input and output (TOCXB
TIOCB
and 8-bit generic input/output
6
to TP
1
1
0
4
1
2
2
), and
, TEND
, TIOCA
, TIOCA
, DREQ
) for 16-bit
, TIOCB
4
7
), ITU
) from Address output
0
3
15
0
0
4
) from DMA
1
), and generic
), external trigger
, TIOCB
to TP
, output (TIOCA
to TP
(A
TPC output
(TP
ITU input and
TIOCB
address output
(A
generic input/output
20
23
0
), output
8
6
)
), DMAC input
to A
3
to TP
4
, TIOCA
, TOCXA
1
, TIOCA
21
4
), and
),
3
2
4
),
,
1
,
),
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