D13002F16V Renesas Electronics America, D13002F16V Datasheet - Page 285
D13002F16V
Manufacturer Part Number
D13002F16V
Description
IC H8/3002 ROMLESS 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.D13002F16V.pdf
(702 pages)
Specifications of D13002F16V
Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, PWM, WDT
Number Of I /o
38
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D13002F16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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9.8 Port B
9.8.1 Overview
Port B is an 8-bit input/output port that is also used for TPC output (TP
input/output (TIOCB
input (DREQ
functions in all operating modes. Figure 9-9 shows the pin configuration of port B.
Pins in port B can drive one TTL load and a 30-pF capacitive load. They can also drive a LED or
a darlington transistor pair. Pins PB
9.8.2 Register Descriptions
Table 9-13 summarizes the registers of port B.
Table 9-13 Port B Registers
Address*
H'FFD4
H'FFD6
Note: * Lower 16 bits of the address.
Port B
1
, DREQ
Name
Port B data direction register
Port B data register
4
, TIOCB
0
), and ADTRG input to the A/D converter. Port B has the same set of pin
Port B pins
PB (input/output)/TP
PB (input/output)/TP
PB (input/output)/TP
PB (input/output)/TP
PB (input/output)/TP
PB (input/output)/TP
PB (input/output)/TP
PB (input/output)/TP
Figure 9-9 Port B Pin Configuration
3
, TIOCA
7
6
5
4
3
2
1
0
3
to PB
4
, TIOCA
0
have Schmitt-trigger inputs.
269
15
14
13
12
11
10
9
8
3
), ITU output (TOCXB
(output)/DREQ (input)/
(output)/DREQ (input)
(output)/TOCXB (output)
(output)/TOCXA (output)
(output)/TIOCB (input/output)
(output)/TIOCA (input/output)
(output)/TIOCB (input/output)
(output)/TIOCA (input/output)
Abbreviation
PBDDR
PBDR
1
0
4
4
3
3
4
4
15
R/W
W
R/W
to TP
4
, TOCXA
ADTRG
8
), ITU
Initial Value
H'00
H'00
(input)
4
), DMAC
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