D13002F16V Renesas Electronics America, D13002F16V Datasheet - Page 527
D13002F16V
Manufacturer Part Number
D13002F16V
Description
IC H8/3002 ROMLESS 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.D13002F16V.pdf
(702 pages)
Specifications of D13002F16V
Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, PWM, WDT
Number Of I /o
38
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D13002F16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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17.1 Overview
The H8/3002 has a power-down state that greatly reduces power consumption by halting CPU
functions. The power-down state includes the following three modes:
•
•
•
Table 17-1 indicates the methods of entering and exiting these power-down modes and the status
of the CPU and on-chip supporting modules in each mode.
Table 17-1 Power-Down State
Mode
Sleep
mode
Software
standby
mode
Hardware Low input at
standby
mode
Notes: 1. RTCNT and bits 7 and 6 of RTMCSR are initialized. Other bits and registers hold their previous states.
Legend
SYSCR: System control register
SSBY:
Sleep mode
Software standby mode
Hardware standby mode
2. The RAME bit must be cleared to 0 in SYSCR before the transition from the program execution state to hardware
Software standby bit
standby mode.
Entering
Conditions
SLEEP instruc- Active
tion executed
while SSBY = 0
in SYSCR
SLEEP instruc- Halted Halted Held
tion executed
while SSBY = 1
in SYSCR
STBY pin
Clock
Halted Halted Undeter-
Section 17 Power-Down State
CPU
Halted Held
CPU
Registers DMAC Controller Functions RAM
mined
Active
Halted Halted
and
reset
Halted Halted
and
reset
513
Refresh
Active
and
held
and
reset
State
*1
Supporting
Active
Halted
and
reset
Halted
and
reset
Held
Held
Held
*2
I/O
Ports
Held
Held
High
impedance • RES
Exiting
Conditions
• Interrupt
• RES
• STBY
• NMI
• IRQ
• RES
• STBY
• STBY
0
to IRQ
2
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