DF2378BVFQ35V Renesas Electronics America, DF2378BVFQ35V Datasheet - Page 647
DF2378BVFQ35V
Manufacturer Part Number
DF2378BVFQ35V
Description
IC H8S/2378 MCU FLASH 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2378BVFQ35V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
35MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
97
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK2378 - DEV EVAL KIT FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
DF2378BVFQ35V
Manufacturer:
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Quantity:
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Bit
3
2
Bit Name
TGFD
TGFC
Initial value
0
0
R/W
R/(W) *
R/(W) *
Description
Input Capture/Output Compare Flag D
Status flag that indicates the occurrence of TGRD
input capture or compare match in channels 0 and
3.
In channels 1, 2, 4, and 5, bit 3 is reserved. It is
always read as 0 and cannot be modified.
[Setting conditions]
•
•
[Clearing conditions]
•
•
Input Capture/Output Compare Flag C
Status flag that indicates the occurrence of TGRC
input capture or compare match in channels 0 and
3.
In channels 1, 2, 4, and 5, bit 2 is reserved. It is
always read as 0 and cannot be modified.
[Setting conditions]
•
•
[Clearing conditions]
•
•
When TCNT = TGRD while TGRD is
functioning as output compare register
When TCNT value is transferred to TGRD by
input capture signal while TGRD is functioning
as input capture register
When DTC is activated by TGID interrupt while
DISEL bit of MRB in DTC is 0
When 0 is written to TGFD after reading TGFD
= 1
When TCNT = TGRC while TGRC is
functioning as output compare register
When TCNT value is transferred to TGRC by
input capture signal while TGRC is functioning
as input capture register
When DTC is activated by TGIC interrupt while
DISEL bit of MRB in DTC is 0
When 0 is written to TGFC after reading TGFC
= 1
Rev.7.00 Mar. 18, 2009 page 579 of 1136
Section 11 16-Bit Timer Pulse Unit (TPU)
REJ09B0109-0700
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