DF2378BVFQ35V Renesas Electronics America, DF2378BVFQ35V Datasheet - Page 711
DF2378BVFQ35V
Manufacturer Part Number
DF2378BVFQ35V
Description
IC H8S/2378 MCU FLASH 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2378BVFQ35V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
35MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
97
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK2378 - DEV EVAL KIT FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2378BVFQ35V
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
DF2378BVFQ35V
Manufacturer:
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Quantity:
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12.4.2
Figure 12.4 shows a sample procedure for setting up normal pulse output.
TPU setup
Port and
PPG setup
TPU setup
Sample Setup Procedure for Normal Pulse Output
Figure 12.4 Setup Procedure for Normal Pulse Output (Example)
Set counting operation
Select interrupt request
Select TGR functions
Set initial output data
Select output trigger
Enable pulse output
Normal PPG output
Compare match?
Set TGRA value
Set next pulse
Set next pulse
Start counter
output data
output data
Yes
No
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
Section 12 Programmable Pulse Generator (PPG)
[1] Set TIOR to make TGRA an output
[2] Set the PPG output trigger period.
[3] Select the counter clock source with
[4] Enable the TGIA interrupt in TIER.
[5] Set the initial output values in
[6] Set the DDR and NDER bits for the
[7] Select the TPU compare match
[8] Set the next pulse output values in
[9] Set the CST bit in TSTR to 1 to start
[10] At each TGIA interrupt, set the next
Rev.7.00 Mar. 18, 2009 page 643 of 1136
compare register (with output
disabled).
bits TPSC2 to TPSC0 in TCR.
Select the counter clear source with
bits CCLR2 to CCLR0.
The DTC or DMAC can also be set
up to transfer data to NDR.
PODR.
pins to be used for pulse output to 1.
event to be used as the output
trigger in PCR.
NDR.
the TCNT counter.
output values in NDR.
REJ09B0109-0700
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