MCIMX357CJQ5C Freescale Semiconductor, MCIMX357CJQ5C Datasheet - Page 96
MCIMX357CJQ5C
Manufacturer Part Number
MCIMX357CJQ5C
Description
MPU MX35 ARM11 400-MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX35r
Specifications of MCIMX357CJQ5C
Core Processor
ARM11
Core Size
32-Bit
Speed
532MHz
Connectivity
1-Wire, CAN, EBI/EMI, Ethernet, I²C, MMC, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.33 V ~ 1.47 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
400-MAPBGA
Processor Series
i.MX357
Core
ARM1136JF-S
Data Bus Width
32 bit
Data Ram Size
128 KB
Interface Type
I2C, JTAG, UART
Maximum Clock Frequency
532 MHz
Number Of Timers
3
Operating Supply Voltage
1.33 V to 1.47 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCIMX357CJQ5C
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MCIMX357CJQ5CR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
1
4.9.15
This section describes the electrical information of the MediaLB Controller module.
96
1
MLBCLK operating frequency
MLBCLK rise time
Timing is guaranteed for NVCC from 2.7 V through 3.1 V and up to a maximum overdrive NVCC of 3.3 V. See the NVCC
restrictions described in
Timing is guaranteed for NVCC from 2.7 V through 3.1 V and up to a maximum overdrive NVCC of 3.3 V. See NVCC
restrictions described in
MSHC_SCLK
MSHC_DATA
MSHC_BS
MSHC_DATA
Signal
Parameter
Signal
MediaLB Controller Electrical Specifications
i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 9
Table
Table
Table 57. Serial Interface Timing Parameters
1
Output delay time
8.
H pulse length
58.
L pulse length
Parameter
Setup time
Setup time
Symbol
Hold time
Hold time
Table 58. Parallel Interface Timing Parameters
Rise time
Fall time
t
Table 59. MLB 256/512 Fs Timing Parameters
f
Cycle
mckr
mck
Output delay time
Parameter
Setup time
Hold time
11.264
Min
—
12.288
24.576
Typ
—
tSCLKwh
tSCLKwl
Symbol
tSCLKc
tSCLKr
tSCLKf
tBSsu
tBSh
tDsu
tDh
tDd
24.6272
25.600
Max
Symbol
3
tDsu
tDh
tDd
1
(continued)
Min.
Units
MHz
25
—
—
—
5
5
8
1
8
1
ns
1
Standards
Min.
—
5
5
Standards
Min: 256 × Fs at 44.0 kHz
Typ: 256 × Fs at 48.0 kHz
Typ: 512 × Fs at 48.0 kHz
Max: 512 × Fs at 48.1 kHz
Max: 512 × Fs PLL unlocked
Max.
Freescale Semiconductor
10
10
15
—
—
—
—
—
—
—
Max.
V
Comment
—
—
15
IL
TO V
IH
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
ns
ns
ns