DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 287
DF2437FV
Manufacturer Part Number
DF2437FV
Description
IC H8S/2437 MCU FLASH 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Specifications of DF2437FV
Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2437FV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 287 of 776
- Download datasheet (5Mb)
This LSI has an on-chip 16-bit free-running timer (FRT) with two channels. The FRT operates on
the basis of the 16-bit free-running counter (FRC), and outputs two independent waveforms, and
measures the input pulse width and external clock periods.
10.1
• Selection of four clock sources
• Two independent comparators
• Four independent input captures
• Counter clearing
• Fourteen independent interrupts
• Special functions provided by automatic addition function
Figure 10.1 shows a block diagram of the FRT.
TIM8FR1A_000020020300
One of the three internal clocks (φ/2, φ/8, or φ/32), or an external clock input can be selected
(enabling use as an external event counter).
Two independent waveforms can be output.
The rising or falling edge can be selected.
Buffer modes can be specified.
The free-running counters can be cleared on compare-match A.
Two compare-match interrupts, four input capture interrupts, and one overflow interrupt can be
requested independently for each channel.
The contents of OCRAR and OCRAF can be added to the contents of OCRA automatically,
enabling a periodic waveform to be generated without software intervention. The contents of
ICRD can be added automatically to the contents of OCRDM × 2, enabling input capture
operations in this interval to be restricted.
Features
Section 10 16-Bit Free-Running Timer (FRT)
Rev.2.00 May. 28, 2009 Page 247 of 732
REJ09B0059-0200
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