DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 294
DF2437FV
Manufacturer Part Number
DF2437FV
Description
IC H8S/2437 MCU FLASH 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Specifications of DF2437FV
Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2437FV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 294 of 776
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Rev.2.00 May. 28, 2009 Page 254 of 732
REJ09B0059-0200
Bit
6
5
4
Bit Name
ICFB
ICFC
ICFD
Initial Value
0
0
0
R/W
R/(W)* Input Capture Flag B
R/(W)* Input Capture Flag C
R/(W)* Input Capture Flag D
Description
This status flag indicates that the FRC value has been
transferred to ICRB by means of an input capture
signal. When BUFEB = 1, ICFB indicates that the new
FRC value has been transferred to ICRB by an input
capture signal and the old ICRB value has been moved
into ICRD.
[Setting condition]
When an input capture signal causes the FRC value to
be transferred to ICRB
[Clearing condition]
Read ICFB when ICFB = 1, then write 0 to ICFB
This status flag indicates that the FRC value has been
transferred to ICRC by means of an input capture
signal. When BUFEA = 1, on occurrence of an input
capture signal specified by the IEDGC bit at the FTIC
input pin, ICFC is set but data is not transferred to
ICRC. In buffer operation, ICFC can be used as an
external interrupt signal by setting the ICICE bit to 1.
[Setting condition]
When an input capture signal occurs
[Clearing condition]
Read ICFC when ICFC = 1, then write 0 to ICFC
This status flag indicates that the FRC value has been
transferred to ICRD by means of an input capture
signal. When BUFEB = 1, on occurrence of an input
capture signal specified by the IEDGD bit at the FTID
input pin, ICFD is set but data is not transferred to
ICRD. In buffer operation, ICFD can be used as an
external interrupt signal by setting the ICIDE bit to 1.
[Setting condition]
When an input capture signal occurs
[Clearing condition]
Read ICFD when ICFD = 1, then write 0 to ICFD
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