M306N4FGGP#U3 Renesas Electronics America, M306N4FGGP#U3 Datasheet - Page 76
M306N4FGGP#U3
Manufacturer Part Number
M306N4FGGP#U3
Description
IC M16C/6N4 MCU FLASH 100-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Specifications of M306N4FGGP#U3
Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
M16C
Maximum Speed
24 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
87
Interface Type
I2C/UART
On-chip Adc
26-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
11
For Use With
R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
Figure 8.1 Clock Generation Circuit
WAIT instruction
Main clock
Main clock
Apr 14, 2006
(stop mode)
Interrupt request level
Software reset
CM10=1
PM00, PM01
CM00, CM01, CM02, CM04, CM05, CM06, CM07 : Bits in CM0 register
CM10, CM11, CM16, CM17
PCLK0, PCLK1
CM21, CM27
CCLK0 to CCLK2, CCLK4 to CCLK6
RESET
judgment output
NMI
Oscillation stop, re-oscillation detection circuit
PLL frequency synthesizer
S
R
S
R
Q
Q
Pulse generating circuit
for clock edge detection
and charge,
discharge control
CM04
page 52 of 376
Programmable
CM05
Sub clock oscillation circuit
counter
XCIN
XIN
Main clock
oscillation circuit
CM21
XCOUT
XOUT
: Bits in PM0 register
: Bits in CM1 register
: Bits in PCLKR register
: Bits in CM2 register
: Bits in CCLKR register
Main clock
Charge,
discharge
circuit
comparator
Phase
Oscillation stop,
detection circuit
PLL frequency
re-oscillation
1
0
synthesizer
oscillator
On-chip
PLL clock
CM27 = 0
CM27 = 1
CM11
Sub clock
CM02
On-chip oscillator
clock
CM21=1
CM21=0
Reset
generating
circuit
Oscillation stop,
re-oscillation detection
interrupt generating
circuit
Charge
pump
a
CM06=0
CM17-CM16=00b
1/2
b
CM06=0
CM17-CM16=01b
1/2
lowpass filter
1/2
controlled
oscillator
Voltage
Internal
(VCO)
I/O ports
a
Oscillation stop
detection reset
1/32
CM06=0
CM17-CM16=10b
b
1/4
Divider
CM21 switch signal
1/2
Divider
Divider
c
Oscillation stop,
re-oscillation detection
interrupt signal
PM01-PM00=00b, CM01-CM00=01b
PM01-PM00=00b, CM01-CM00=10b
fC32
d
c
CM06=1
1/8
e
1/2
CM07=0
CM07=1
By CCLK0,1 and 2
By CCLK4,5 and 6
1/16
8. Clock Generation Circuit
CM01-CM00=00b
CM06=0
CM17-CM16=11b
1/2
1/2
PCLK0=1
PCLK0=0
PCLK0=1
PCLK0=0
PCLK1=1
PCLK1=0
Details of divider
1/32
d
e
fCAN0
f
CAN1
PM01-PM00=00b,
CM01-CM00=11b
CPU clock
PLL clock
BCLK
f
AD
CLKOUT
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