HD6417041AVF16V Renesas Electronics America, HD6417041AVF16V Datasheet - Page 311
HD6417041AVF16V
Manufacturer Part Number
HD6417041AVF16V
Description
IC SUPERH MCU ROMLESS 144QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7040r
Specifications of HD6417041AVF16V
Core Processor
SH-2
Core Size
32-Bit
Speed
28.7MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
98
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417041AVF16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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4. Variables Used in the Operation Descriptions of other Instructions, etc.
The following variables are used when describing the operation of DSP operation instructions for
which the DCT, DCF conditions can be designated.
In the above definitions, EX_DCT and EX_DCF are variables that become true when the DCT,
DCF conditions are designated in instructions. Refer to (1) DSP register definitions for
DSPDCBIT.
In DSP arithmetic operations, saturation processing is performed when the SR register’s saturation
bit is a 1. This saturation bit is called SBIT when describing the operations.
Additionally, the following function is defined to be used in common, to simplify the notation
when describing operations:
#define DSP_M_DST
#define DSP_M_DST_MSB
#define DSP_M_DSTG
#define DSP_M_DSTG_LSB8 DSP_MUL_Set.aa.dstg.lsb8
#define DSP_UNCONDITIONAL_UPDATE (!EX_DCT && !EX_DCF)
#define DSP_CONDITION_MATCH ((EX_DCT && DSPDCBIT) || (EX_DCF &&
!DSPDCBIT))
#define DSP_CONDITION_NOT_MATCH ((EX_DCT && !DSPDCBIT)||(EX_DCF &&
DSPDCBIT))
/* Function used in common in descriptions of DSP operation
instructions */
unsigned char carry_bit, borrow_bit, negative_bit, zero_bit,
overflow_bit;
overflow_protection()
{
*/
if(DSP_ALU_DSTG_BIT7==0) { /* positive value */
if(SBIT && overflow_bit) { /* Overflow Protection Enable & overflow
if((DSP_ALU_DSTG_LSB8!=0x0) || (DSP_ALU_DST_MSB!=0)) {
}
DSP_ALU_DSTG= 0x0;
DSP_ALU_DST = 0x7fffffff;
DSP_MUL_Set.uli[2]
DSP_MUL_Set.uli[3]
DSP_MUL_Set.aa.dst.msb
Rev. 5.00 Jun 30, 2004 page 295 of 512
Section 6 Instruction Descriptions
REJ09B0171-0500O
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