DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 331

• Manufacturer Part Number: DF70845AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70845AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Bit
15 to 12
11
10
9
8
7 to 5
Bit Name

RFSH
RMODE

BACTV

Initial
Value
All 0
0
0
0
0
All 0
R/W
R
R/W
R/W
R
R/W
R
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Refresh Control
Specifies whether or not the refresh operation of
SDRAM is performed.
0: No refresh
1: Refresh
Refresh Control
Specifies whether to perform auto-refresh or self-
refresh when the RFSH bit is 1. When the RFSH bit is 1
and this bit is 1, self-refresh starts immediately. When
the RFSH bit is 1 and this bit is 0, auto-refresh starts
according to the contents that are set in RTCSR,
RTCNT, and RTCOR.
0: Auto-refresh is performed
1: Self-refresh is performed
Reserved
This bit is always read as 0. The write value should
always be 0.
Bank Active Mode
Specifies to access whether in auto-precharge mode
(using READA and WRITA commands) or in bank
active mode (using READ and WRIT commands).
0: Auto-precharge mode (using READA and WRITA
1: Bank active mode (using READ and WRIT
Note: Bank active mode can be used only for the area
Reserved
These bits are always read as 0. The write value should
always be 0.
commands)
commands)
3. The bus width can be set as 16 or 32 bits.
When both the area 2 and area 3 are set to
SDRAM, specify auto-precharge mode.
Rev. 3.00 May 17, 2007 Page 273 of 1582
Section 9 Bus State Controller (BSC)
REJ09B0181-0300