DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 67

• Manufacturer Part Number: DF70845AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70845AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PE5/CS6/TIOC1B/TXD3/ASEBRKAK *
Notes: 1. This pin is fixed to V
PE7/BS/TIOC2B/UBCTRG/RXD2/SSI
2. This pin is for the E10A emulator. It is fixed to V
3. These pin functions are only available in the F-ZTAT version (i.e., they are not available in the mask ROM and ROM-less versions).
4. These pin functions are only available in the F-ZTAT version supporting full functions of E10A (not available in normal F-ZTAT version).
in the F-ZTAT version.
PE1/TEND0/TIOC0B/TRST *
PE0/DREQ0/TIOC0A/TMS*
PE3/TEND1/TIOC0D/TDO *
PE2/DREQ1/TIOC0C/TDI *
PE11/TIOC3D/RXD3/CTS3
PE4/TIOC1A/RXD3/TCK *
PE8/TIOC3A/SCK2/SSCK
PE10/TIOC3C/TXD2/SSO
PE9/TIOC3B/SCK3/RTS3
PE12/TIOC4A/TXD3/SCS
PE6/CS7/TIOC2A/SCK3
PE13/TIOC4B/MRES
3
/ASEBRK *
PF0/AN0
PF1/AN1
PF2/AN2
PF3/AN3
PF4/AN4
PF5/AN5
PF6/AN6
PF7/AN7
SS
AVss
AVcc
Vss
Vss
Vcc
Vc
in the mask ROM and ROM-less versions and is used as the FWE input pin in the F-ZTAT version.
3
3
3
3
3
3
L
100
101
102
103
104
105
106
107
108
109
110
111
112
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
Figure 1.3 Pin Assignments of SH7084
84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57
1
2 3
4 5
6 7
CC
8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
in the mask ROM and ROM-less versions and is used as the ASEMD0 input pin
LQFP-112
(Top view)
Rev. 3.00 May 17, 2007 Page 9 of 1582
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Section 1 Overview
PD12/D12/TIOC4AS
Vss
PD13/D13/TIOC4BS
PD14/D14/TIOC4CS/AUDCK*
PD15/D15/TIOC4DS/AUDSYNC*
PA0/CS4/RXD0
PA1/CS5/TXD0
PA2/A25/DREQ0/IRQ0/SCK0
PA3/A24/RXD1
PA4/A23/TXD1
PA5/A22/DREQ1/IRQ1/SCK1
PA6/CS2/TCLKA
PA7/CS3/TCLKB
PA8/RDWR/IRQ2/TCLKC
PA9/CKE/IRQ3/TCLKD
PA10/CS0/POE4
PA11/CS1/POE5
Vss
PA12/WRL/DQMLL/POE6
Vcc
PA13/WRH/DQMLU/POE7
WDTOVF
PA14/RD
Vcc (ASEMD0*
PB9/A21/IRQ7/ADTRG/POE8
PB8/A20/WAIT/IRQ6/SCK0
PB7/A19/BREQ/IRQ5/TXD0
PB6/A18/BACK/IRQ4/RXD0
REJ09B0181-0300
2
)
4
4