DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 857

• Manufacturer Part Number: DF70845AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70845AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Bit
6
5
Bit Name
RIE
TE
Initial
value
0
0
R/W
R/W
R/W
Description
Receive Interrupt Enable
Enables or disables the receive-data-full (RXIF)
interrupts requested when the RDF flag or DR flag in
serial status register (SCFSR) is set to1, receive-error
(ERIF) interrupts requested when the ER flag in SCFSR
is set to1, and break (BRIF) interrupts requested when
the BRK flag in SCFSR or the ORER flag in line status
register (SCLSR) is set to1.
0: Receive-data-full interrupt (RXIF), receive-error
1: Receive-data-full interrupt (RXIF), receive-error
Note: * RXIF interrupt requests can be cleared by
Transmit Enable
Enables or disables the SCIF serial transmitter.
0: Transmitter disabled
1: Transmitter enabled*
Note: * Serial transmission starts after writing of
Section 16 Serial Communication Interface with FIFO (SCIF)
interrupt (ERIF), and break interrupt (BRIF) requests
are disabled*
interrupt (ERIF), and break interrupt (BRIF) requests
are enabled
reading the DR or RDF flag after it has been
set to 1, then clearing the flag to 0, or by
clearing RIE to 0. ERIF or BRIF interrupt
requests can be cleared by reading the ER, BR
or ORER flag after it has been set to 1, then
clearing the flag to 0, or by clearing RIE and
REIE to 0.
transmit data into SCFTDR. Select the transmit
format in SCSMR and SCFCR and reset the
transmit FIFO before setting TE to 1.
Rev. 3.00 May 17, 2007 Page 799 of 1582
REJ09B0181-0300