M306N5FCTFP#U0 Renesas Electronics America, M306N5FCTFP#U0 Datasheet - Page 136
M306N5FCTFP#U0
Manufacturer Part Number
M306N5FCTFP#U0
Description
IC M16C/6N MCU FLASH 128K 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Specifications of M306N5FCTFP#U0
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
87
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
For Use With
R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Part Number:
M306N5FCTFP#U0M306N5FCTFP#UK
Manufacturer:
Renesas Electronics America
Quantity:
135
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M16C/6N Group (M16C/6N5)
Rev.2.40
REJ09B0011-0240
Table 13.5 PWM Mode Specifications
j = i - 1, except j = 4 if i = 0
k = i + 1, except k = 0 if i = 4
i = 0 to 4
Count source
Count operation
16-bit PWM
8-bit PWM
Count start condition
Count stop condition
Interrupt request generation timing On the falling edge of the PWM pulse
TAiIN pin function
TAiOUT pin function
Read from timer
Write to timer
13.1.4 Pulse Width Modulation (PWM) Mode
In PWM mode, the timer outputs pulses of a given width in succession. The counter functions as either
16-bit pulse width modulator or 8-bit pulse width modulator.
Table 13.5 lists the PWM Mode Specifications. Figure 13.12 shows Registers TA0MR to TA4MR in PWM
Mode. Figures 13.13 and 13.14 show an Example of 16-bit Pulse Width Modulator Operation and 8-bit
Pulse Width Modulator Operation.
Apr 14, 2006
Item
page 114 of 372
f1, f2, f8, f32, fC32
• Down-count (operating as an 8-bit or a 16-bit pulse width modulator)
• The timer reloads a new value at a rising edge of PWM pulse and continues counting
• The timer is not affected by a trigger that occurs during counting
• High level width n / fj
• Cycle time (2
• High level width n ✕ (m+1) / fj n : set value of the TAi register high-order address
• Cycle time (2
• The TAiS bit in the TABSR register is set to 1 (count starts)
• The TAiS bit = 1 and external trigger input from the TAiIN pin
• The TAiS bit = 1 and one of the following external triggers occurs
The TAiS bit is set to 0 (count stops)
I/O port or trigger input
Pulse output
An undefined value is read by reading the TAi register
• When not counting and until the 1st count source is input after counting start
• When counting (after 1st count source input)
Timer B2 overflow or underflow,
Timer Aj overflow or underflow,
Timer Ak overflow or underflow
Value written to the TAi register is written to both reload register and counter
Value written to the TAi register is written to only reload register
(Transferred to counter when reloaded next)
8
-1) ✕ (m+1) / fj m : set value of the TAi register low-order address
16
-1) / fj fixed fj : count source frequency (f1, f2, f8, f32, fC32)
n : set value of the TAi register
Specification
13. Timers
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