M306N5FCTFP#U0 Renesas Electronics America, M306N5FCTFP#U0 Datasheet - Page 162
M306N5FCTFP#U0
Manufacturer Part Number
M306N5FCTFP#U0
Description
IC M16C/6N MCU FLASH 128K 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Specifications of M306N5FCTFP#U0
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
87
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
For Use With
R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M306N5FCTFP#U0M306N5FCTFP#UK
Manufacturer:
Renesas Electronics America
Quantity:
135
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M16C/6N Group (M16C/6N5)
Rev.2.40
REJ09B0011-0240
Figure 15.5 Registers U0TB to U2TB, U0RB to U2RB, and U0BRG to U2BRG
UARTi Transmit Buffer Register (i = 0 to 2)
UARTi Receive Buffer Register (i = 0 to 2)
UARTi Bit Rate Register (i = 0 to 2)
(b15)
NOTE:
(b15)
NOTES:
NOTES:
b7
b7
b7
1. Use the MOV instruction to write to this register.
1. The ABT bit is set to 0 by writing 0 in a program. (Writing 1 has no effect.)
2. When bits SMD2 to SMD0 in the UiMR register = 000b (serial interface disabled) or the RE bit in the UiC1 register = 0
3. These error flags are disabled when bits SMD2 to SMD0 in the UiMR register are set to 001b (clock synchronous serial
1. Write to this register while serial interface is neither transmitting nor receiving.
2. Use the MOV instruction to write to this register.
3. Write to this register after setting bits CLK1 to CLK0 in the UiC0 register.
Apr 14, 2006
(reception disabled), all of bits SUM, PER, FER, and OER are set to 0 (no error). The SUM bit is set to 0 (no error) when
all of the PER, FER and OER bits are = 0 (no error).
Also, the PER and FER bits are set to 0 by reading the lower byte of the UiRB register.
I/O mode) or to 010b (I
page 140 of 372
(b8)
(b8)
b0
b0
b0
2
b7
b7
C mode). When read, the content is undefined.
(b10-b9)
Symbol
(b15-b9)
Symbol
(b7-b0)
Symbol
(b7-b0)
(b8-b0)
OER
SUM
FER
PER
ABT
(1) (2) (3)
(b8)
Bit
Bit
Bit
-
-
-
-
-
-
b0
b0
Transmit data
Nothing is assigned. If necessary, set to 0.
When read, the content is undefined.
-
-
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Arbitration lost
detecting flag
Overrun error flag
Framing error
flag
Parity error flag
Error sum flag
Assuming that set value = n, UiBRG
divides the count source by n + 1
(1)
(2) (3)
Bit Name
Symbol
Symbol
Symbol
U0BRG
U1BRG
U2BRG
U0TB
U1TB
U2TB
U0RB
U1RB
U2RB
(1)
(2) (3)
Function
(2) (3)
(2)
Receive data (
Receive data (
0 : Not detected
1 : Detected
0 : No overrun error
1 : Overrun error found
0 : No framing error
1 : Framing error found
0 : No parity error
1 : Parity error found
0 : No error
1 : Error found
03ABh to 03AAh
03AFh to 03AEh
03A3h to 03A2h
01FBh to 01FAh
03A7h to 03A6h
01FFh to 01FEh
Function
Address
Address
Address
03A1h
03A9h
01F9h
D7 to D0)
D8)
Function
00h to FFh
Setting Range
After Reset
After Reset
After Reset
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
15. Serial Interface
WO
WO
RW
RW
RW
RW
RO
RO
RO
RO
RO
RO
-
-
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