M306N5FCTFP#U0 Renesas Electronics America, M306N5FCTFP#U0 Datasheet - Page 224
M306N5FCTFP#U0
Manufacturer Part Number
M306N5FCTFP#U0
Description
IC M16C/6N MCU FLASH 128K 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Specifications of M306N5FCTFP#U0
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
87
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
For Use With
R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M306N5FCTFP#U0M306N5FCTFP#UK
Manufacturer:
Renesas Electronics America
Quantity:
135
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M16C/6N Group (M16C/6N5)
Rev.2.40
REJ09B0011-0240
16.2 Function
Figure 16.9 External Op-Amp Connection
16.2.1 Resolution Select Function
16.2.2 Sample and Hold
16.2.3 Extended Analog Input Pins
16.2.4 External Operation Amplifier (Op-Amp) Connection Mode
The desired resolution can be selected using the BITS bit in the ADCON1 register. If the BITS bit is set to 1
(10-bit conversion accuracy), the A/D conversion result is stored in the bits 0 to 9 in the ADi register (i = 0
to 7). If the BITS bit is set to 0 (8-bit conversion accuracy), the A/D conversion result is stored in the bits
0 to 7 in the ADi register.
If the SMP bit in the ADCON2 register is set to 1 (with sample and hold), the conversion speed per pin is
increased to 28 φAD cycles for 8-bit resolution or 33 φAD cycles for 10-bit resolution. Sample and hold is
effective in all operating modes. Select whether or not to use the sample and hold function before starting
A/D conversion.
In one-shot and repeat modes, pins ANEX0 and ANEX1 can be used as analog input pins. Use bits OPA1
to OPA0 in the ADCON1 register to select whether or not use ANEX0 and ANEX1.
The A/D conversion results of ANEX0 and ANEX1 inputs are stored in registers AD0 and AD1, respectively.
Multiple analog inputs can be amplified using a single external op-amp via pins ANEX0 and ANEX1.
Set bits OPA1 to OPA0 in the ADCON1 register to 11b (external op-amp connection mode). The inputs
from ANi (i = 0 to 7)
sending it back to the ANEX1 pin. The A/D conversion result is stored in the corresponding ADi register.
The A/D conversion speed depends on the response characteristics of the external op-amp.
Figure 16.9 shows an External Op-Amp Connection.
NOTE:
1. AN0_i and AN2_i can be used the same as ANi.
Apr 14, 2006
page 202 of 372
(1)
External op-amp
are output from the ANEX0 pin. Amplify this output with an external op-amp before
ANEX0
ANEX1
AN0_0
AN0_1
AN0_2
AN0_3
AN0_4
AN0_5
AN0_6
AN0_7
AN2_0
AN2_1
AN2_2
AN2_3
AN2_4
AN2_5
AN2_6
AN2_7
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
Bits ADGSEL1 to ADGSEL0 in ADCON2 register = 00b
Bits ADGSEL1 to ADGSEL0 = 10b
Bits ADGSEL1 to ADGSEL0 = 11b
Successive conversion
Resistor ladder
register
Comparator
MCU
16. A/D Converter
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