M306N5FCTFP#U0 Renesas Electronics America, M306N5FCTFP#U0 Datasheet - Page 364
M306N5FCTFP#U0
Manufacturer Part Number
M306N5FCTFP#U0
Description
IC M16C/6N MCU FLASH 128K 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Specifications of M306N5FCTFP#U0
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
87
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
For Use With
R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M306N5FCTFP#U0M306N5FCTFP#UK
Manufacturer:
Renesas Electronics America
Quantity:
135
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M16C/6N Group (M16C/6N5)
Rev.2.40
REJ09B0011-0240
• When entering medium-speed mode after transferring to stop mode from low-speed mode and low
• Wait until the main clock oscillation stabilizes, before switching the clock source for CPU clock to the main
• Suggestions to reduce power consumption.
Ports
A/D converter
D/A converter
Stopping peripheral functions
Switching the oscillation-driving capacity
power dissipation mode, write the MOV instruction (MOV.W #IMM16, abs16) as described below.
When entering stop mode and exiting from stop mode, DMA transfer must be disabled.
Change the src value (marked as “#2118”) depending on your usage condition.
clock.
Similarly, wait until the sub clock oscillation stabilizes, before switching the clock source for CPU clock to
the sub clock.
The processor retains the state of each I/O port even when it goes to wait mode or to stop mode.
A current flows in active I/O ports. A pass current flows in input ports that high-impedance state.
When entering wait mode or stop mode, set non-used ports to input and stabilize the potential.
When A/D conversion is not performed, set the VCUT bit in the ADCON1 register to 0 (VREF not connection).
When A/D conversion is performed, start the A/D conversion at least 1 µs or longer after setting the VCUT
bit to 1 (VREF connection).
When not performing D/A conversion, set the DAiE bit (i = 0, 1) in the DACON register to 0 (input
disabled) and DAi register to 00h.
Use the CM02 bit in the CM0 register to stop the unnecessary peripheral functions during wait mode.
However, because the peripheral function clock (fC32) generated from the sub-clock does not stop, this
measure is not conducive to reducing the power consumption of the chip. If low speed mode or low power
dissipation mode is to be changed to wait mode, set the CM02 bit to 0 (do not peripheral function clock
stopped when in wait mode), before changing wait mode.
Set the driving capacity to “LOW” when oscillation is stable.
Apr 14, 2006
page 342 of 372
L1:
MOV.W #2118H,CM0 ; Stop mode setting [#IMM16, abs16]
JMP.S
NOP
NOP
NOP
NOP
L1
;
; Countermeasure to avoid the program from
; stopping by reading instruction ahead
; (insert 4 or more NOPs)
;
23. Usage Notes
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