M306N5FCTFP#U0 Renesas Electronics America, M306N5FCTFP#U0 Datasheet - Page 381
M306N5FCTFP#U0
Manufacturer Part Number
M306N5FCTFP#U0
Description
IC M16C/6N MCU FLASH 128K 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Specifications of M306N5FCTFP#U0
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
87
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
For Use With
R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M306N5FCTFP#U0M306N5FCTFP#UK
Manufacturer:
Renesas Electronics America
Quantity:
135
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M16C/6N Group (M16C/6N5)
Rev.2.40
REJ09B0011-0240
Figure 23.3 When Updating Period of CAN Module Matches Access Period from CPU
Figure 23.4 With a Wait Time of 3 fCAN Before CPU Read
Figure 23.5 When Polling Period of CPU is 3 fCAN or Longer
CPU read signal
Updating period of
the CAN module
CPU reset signal
C0STR register
b8: Reset state flag
CPU read signal
Updating period of
the CAN module
CPU reset signal
C0STR register
b8: State_Reset bit
fCAN
CPU read signal
Updating period of
CAN module
CPU reset signal
C0STR register
b8: State_Reset bit
0: CAN operation
1: CAN reset/initial-
0: CAN operation
1: CAN reset/initial-
0: CAN operation
1: CAN reset/initial-
Apr 14, 2006
mode
ization mode
mode
ization mode
mode
ization mode
page 359 of 372
Wait time
✕: When the CAN module's State_Reset bit updating period matches the CPU's read
✕: When the CAN module’s State_Reset bit updating period matches the CPU’s read
: Updated without fail in period of 4 fCAN
✕
✕
period, it does not enter reset mode, for the CPU read has the higher priority.
: Updated without fail in period of 3 fCAN
period, it does not enter reset mode, for the CPU read has the higher priority.
4 f
CAN
✕
✕
✕
✕
23. Usage Notes
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