HD6417708SF60V Renesas Electronics America, HD6417708SF60V Datasheet - Page 48
HD6417708SF60V
Manufacturer Part Number
HD6417708SF60V
Description
IC SUPERH MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417708SF60V.pdf
(635 pages)
Specifications of HD6417708SF60V
Core Processor
SH-2
Core Size
32-Bit
Speed
60MHz
Connectivity
EBI/EMI, SCI, SmartCard
Peripherals
POR, WDT
Number Of I /o
8
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417708SF60V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417708SF60V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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Table 2.3
Instruction Format
nmd
format
d format
d12 format
nd8 format
i format
ni format
Note: In a multiply-and-accumulate instruction, nnnn is the source register.
28
15
15
15
15
15
15
Instruction Formats (cont)
xxxx
xxxx
xxxx
xxxx
xxxx
xxxx
nnnn
dddd
nnnn
nnnn
xxxx
xxxx
mmmm
dddd
dddd
dddd
i i i i
i i i i
dddd
dddd
dddd
dddd
i i i i
i i i i
0
0
0
0
0
0
Source
Operand
mmmm: register
direct
mmmmdddd:
register indirect
with displacement
dddddddd: GBR
indirect with
displacement
R0 (register
direct)
dddddddd:
PC-relative with
displacement
dddddddd:
PC-relative
dddddddddddd:
PC-relative
dddddddd:
PC-relative with
displacement
iiiiiiii: immediate
iiiiiiii: immediate
iiiiiiii: immediate
iiiiiiii: immediate
Destination
Operand
nnnndddd:
register
indirect with
displacement
nnnn: register
direct
R0 (register
direct)
dddddddd:
GBR indirect
with
displacement
R0 (register
direct)
—
—
nnnn: register
direct
Indexed GBR
indirect
R0 (register
direct)
—
nnnn: register
direct
Instruction
Example
MOV.L
Rm,@(disp,Rn)
MOV.L
@(disp,Rm),Rn
MOV.L
@(disp,GBR),R0
MOV.L
R0,@(disp,GBR)
MOVA
@(disp,PC),R0
BF
BRA
(label = disp +
PC)
MOV.L
@(disp,PC),Rn
AND.B
#imm,
@(R0,GBR)
AND
#imm,R0
TRAPA #imm
ADD
#imm,Rn
label
label
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