HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 465
HD64F7047FW40V
Manufacturer Part Number
HD64F7047FW40V
Description
MCU 5V 256K I-TEMP,PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet
1.HD64F7047F50V.pdf
(766 pages)
Specifications of HD64F7047FW40V
Core Processor
SH-2
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Bit
14
13
12
11, 10
Bit Name
IRR14
IRR13
IRR12
Initial
Value
0
0
0
All 0
R/W
R/W
R/W
R/W
R
Description
Timer Compare Match Interrupt Flag 0
Indicates that a compare match occurred in TCMR0.
0: Timer compare match has not occurred in TCMR0
1: Timer compare match has occurred in TCMR0
[Clearing condition]
•
[Setting condition]
•
Note: This bit is not set when TCMR0 = H'0000.
Timer Overflow Interrupt Flag
Indicates that the timer has overflowed.
0: Timer has not overflowed
1: Timer has overflowed
[Clearing condition]
•
[Setting condition]
•
Note: This bit is set even when TCMR0 is enabled to clear the
Bus Operation Interrupt Flag
Status flag indicating detection of a dominant bit due to
bus operation when the HCAN2 module is in HCAN2
sleep mode.
0: Bus idle state (during HCAN2 sleep mode)
1: CAN bus operation (during HCAN2 sleep mode)
[Clearing condition]
•
[Setting condition]
•
Reserved
These bits are always read as 0. The write value should
always be 0.
Writing 1
TCMR0 = TCNTR
Writing 1
Timer has overflowed and the value of TCNTR
changes from H'FFFF to H'0000.
Writing 1
When the bus operation (dominant bit) is detected
during HCAN2 sleep mode
timer value and its value is set to H'FFFF.
Rev. 2.00, 09/04, page 423 of 720
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