D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 195
D6417729RHF200BV
Manufacturer Part Number
D6417729RHF200BV
Description
IC SUPER H MPU ROMLESS 208QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417729RF133BV.pdf
(857 pages)
Specifications of D6417729RHF200BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.85 V ~ 2.15 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Quantity
Price
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Part Number:
D6417729RHF200BV
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Whenever CCR2 bit 8 (W3LOCK) or bit 0 (W2LOCK) is high the cache is locked. The locked
data will not be overwritten unless the W3LOCK bit and W2LOCK bit are reset or the PREF
condition in DSP mode matches. In cache locking mode, the LRU values in table 5.2 will be
replaced by those in tables 5.4 to 5.6.
Table 5.4
LRU (5–0)
000000, 000001, 000100, 010100, 100000, 100001, 110000, 110100
000011, 000110, 000111, 001011, 001111, 010110, 011110, 011111
101001, 101011, 111000, 111001, 111011, 111100, 111110, 111111
Table 5.5
LRU (5–0)
000000, 000001, 000011, 001011, 100000, 100001, 101001, 101011
000100, 000110, 000111, 001111, 010100, 010110, 011110, 011111
110000, 110100, 111000, 111001, 111011, 111100, 111110, 111111
W2LOCK: Way 2 lock bit. W2LOAD: Way 2 load bit.
When W2LOCK = 1 & W2LOAD = 1 & DSP = 1, the prefetched data will always be loaded
into way 2. In all other conditions the prefetched data will be loaded into the way pointed to
by LRU.
W3LOCK: Way 3 lock bit. W3LOAD: Way 3 load bit.
When W3LOCK = 1 & W3LOAD = 1 & DSP = 1, the prefetched data will always be loaded
into way 3. In all other conditions the prefetched data will be loaded into the way pointed to
by LRU.
Note: W2LOAD and W3LOAD should not be set high at the same time.
31
LRU and Way Replacement (when W2LOCK=1)
LRU and Way Replacement (when W3LOCK=1)
Figure 5.3 CCR2 Register Configuration
LOAD
W3
9
LOCK
W3
8
7
Rev. 5.0, 09/03, page 147 of 806
Way to be Replaced
3
1
0
Way to be Replaced
2
1
0
2
LOAD
W2
1
LOCK
W2
0
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