M30833FJGP#U5 Renesas Electronics America, M30833FJGP#U5 Datasheet - Page 307
M30833FJGP#U5
Manufacturer Part Number
M30833FJGP#U5
Description
IC M32C/83 MCU FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets
1.M3087BFLGPU3.pdf
(364 pages)
2.M30833FJGPU3.pdf
(96 pages)
3.M30833FJGPU3.pdf
(529 pages)
Specifications of M30833FJGP#U5
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30833FJGP#U5M30833FJGP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R
R
M
e
E
3
. v
J
Figure 21.26 SR Waveform Output Mode
2
0
1
9
C
3 .
B
8 /
0
1
3
0
3
J
G
4
a
0 -
n
o r
3 .
1
u
, 1
3
(1) Free-Running Operation
(2) The Base Timer is Reset when the Base Timer Matches the GiPO0 Register
p
1
2
(
(The RST2 to RST0 bits in the GiBCR1 register are set to "000
(The RST1 bit is set to "1", and the RST0 and RST2 bits are set to "0")
M
0
POijR bit
POikR bit
0
3
Base Timer i
POijR bit
POikR bit
Base timer i
OUTCij pin
OUTCij pin
OUTCij pin
The diagram above applies under the following conditions:
6
2
• The IVL bit in the GiPOCRk register is set to "0" (outputs "0" as default value). The INV bit is set
• The UD1 to UD0 bits in the GiBCR1 register are set to "00
• m < n < p+2
C
NOTES:
The diagram above applies under the following condition:
to "0" (not inversed).
Page 282
8 /
• The RST2 to RST0 bits in the GiBCR1 register are set to "000
• m < n
, 3
2. Waveform output when the INV bit is set to "0" (not inversed) and the IVL bit is set to "1"
1. Waveform output when the INV bit in the GiPOCRj register is set to "0" (not inversed) and
(16-bit waveform generation function).
the CAS bit to "0" (16-bit waveform generation function).
the UD1 to UD0 bits to "00
(1)
(2)
the IVL bit is set to "0" (output "L" as default value).
(output "H" as default value).
0000
M
FFFF
0000
p+2
3
"H"
"1"
"0"
"1"
"0"
"L"
m
16
2
n
16
"H"
"L"
"H"
"L"
"1"
"0"
"1"
"0"
16
i=0, 3; j=0, 2, 4, 6 (however, i=0 when j=0, 4); k=j+1
m : Setting value of the GiPOj register (0000
n : Setting value of the GiPOk register (0000
POijR, POikR bits: Bits in the IIO0IR to IIO11IR registers
i=0 to 3; j=2, 4, 6 (however, i=0 when j=4);
m : Setting value of the GiPOj register (0000
n: Setting value of the GiPOk register (0000
p: Setting value of the GiPO0 register (0001
POijR, POikR bits: Bits in the IIO0IR to IIO11IR registers
m
C
n
f o
8 /
4
3
8
) T
8
n-m
f
2
BTi
" (counter increment mode), and the CAS bit to "0"
n-m
f
BTi
Write "0" by program
if setting to "0"
Write "0" by program
if setting to "0"
p+2-n+m
65536
f
BTi
f
Write "0" by program
if setting to "0"
BTi
65536-n+m
f
Write "0" by program
if setting to "0"
BTi
2
21. Intelligent I/O (Waveform Generation Function)
" (counter increment mode) and
16
16
16
16
16
k=j+1
to FFFF
to FFFD
to FFFF
to FFFF
to FFFF
2
" (no base timer reset),
16
16
16
16
16
)
)
)
)
)
2
")
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