M30833FJGP#U5 Renesas Electronics America, M30833FJGP#U5 Datasheet - Page 326
M30833FJGP#U5
Manufacturer Part Number
M30833FJGP#U5
Description
IC M32C/83 MCU FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets
1.M3087BFLGPU3.pdf
(364 pages)
2.M30833FJGPU3.pdf
(96 pages)
3.M30833FJGPU3.pdf
(529 pages)
Specifications of M30833FJGP#U5
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30833FJGP#U5M30833FJGP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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M
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3
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NOTES:
NOTES:
NOTES:
2
Table 21.24 Pin Settings in UART Mode (1)
Table 21.25 Pin Settings (2)
Table 21.26 Pin Settings (3)
Table 21.27 Pin Settings (4)
0
Name
P7
P7
P7
Name
P8
Name
P11
P11
Name
P15
P15
1
C
9
Port
Port
Port
Port
1. Set the MOD2 to MOD0 bits in the corresponding register to "111
1. Set the MOD2 to MOD0 bits in the corresponding register to "111
1. Set the MOD2 to MOD0 bits in the corresponding register to "111
3 .
B
8 /
3
5
6
0
0
1
0
2
0
2
function used).
function used).
function used).
3
0
3
J
G
4
a
0 -
n
o r
ISTxD1 output
ISRxD1 input
ISTxD0 output
ISRxD0 input
ISTxD1 output
ISRxD1 input
ISTxD0 output
ISRxD0 input
3 .
1
u
Function
Function
, 1
3
Function
Function
p
1
2
(
M
0
0
3
6
2
C
8 /
Page 301
, 3
PS1 Register PSL1 Register PSC Register PD7 Register IPS Register
PS1_3 = 1
PS1_5 = 0
PS1_6 = 1
PS2 Register PSL2 Register PD8 Register IPS Register
PS2_0 = 0
PS5 Register PD11 Register IPS Register
PS5_0 = 1
PS5_2 = 0
PS9 Register PD15 Register IPS Register
PS9_0 = 1
-
M
3
2
C
f o
8 /
4
3
8
) T
8
PSL1_3 = 0
-
PSL1_6 = 0
-
Bit and Setting
-
PD11_2 = 0
Bit and Setting
-
PD15_2 = 0
Bit and Setting
Bit and Setting
PSC_3 = 1
-
PSC_6 = 0
PD8_0 = 0
-
IPS1 = 1
-
IPS0 = 1
21. Intelligent I/O (Group 0, 1 Communication Function)
-
PD7_5 = 0
-
IPS0 = 0
Register
G1POCR0
-
Register
G0POCR0
-
2
2
2
(1)
(1)
" (output of the communication
" (output of the communication
" (output of the communication
-
IPS1 = 0
-
Register
-
Register
G1POCR0
-
G0POCR0
(1)
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