M30833FJGP#U5 Renesas Electronics America, M30833FJGP#U5 Datasheet - Page 353
M30833FJGP#U5
Manufacturer Part Number
M30833FJGP#U5
Description
IC M32C/83 MCU FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets
1.M3087BFLGPU3.pdf
(364 pages)
2.M30833FJGPU3.pdf
(96 pages)
3.M30833FJGPU3.pdf
(529 pages)
Specifications of M30833FJGP#U5
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30833FJGP#U5M30833FJGP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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22.1.1.4 TSPRE1, TSPRE0 Bits
22.1.1.5 TSRESET Bit
22.1.1.6 ECRESET Bit
3
0
The TSPRE1 and TSPRE0 bits determine which count source is used for the time stamp counter.
When the TSRESET bit is set to "1" (counter reset), the C0TSR register is set to "0000
TSRESET bit is automatically set to "0" after the C0TSR register is set to "0000
When the ECRESET bit is set to "1", the C0TEC and C0REC registers are set to "00
module forcibly goes into an error active state.
The ECRESET bit is automatically set to "0" after the CAN module enters an error active state.
3
NOTES:
NOTES:
NOTES:
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1. Change the BASICCAN bit only when the STATE_RESET bit is set to "1" (CAN module reset
2. The message slot 14 is the first slot to become active after the RESET0 and RESET1 bits are
3. The message slots 0 to 13 are not affected by entering BasicCAN mode.
1. Change the TSPRE1 to TSPRE0 bits only when the STATE_RESET bit is set to "1" (CAN
1. In an error active state, the CAN module is ready to communicate when 11 continuous reces-
3 .
1
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completed).
set to "0".
module reset completed).
sive bits are detected on the CAN bus.
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