M30833FJFP#U5 Renesas Electronics America, M30833FJFP#U5 Datasheet - Page 135
M30833FJFP#U5
Manufacturer Part Number
M30833FJFP#U5
Description
IC M32C/83 MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets
1.M3087BFLGPU3.pdf
(364 pages)
2.M30833FJGPU3.pdf
(96 pages)
3.M30833FJGPU3.pdf
(529 pages)
Specifications of M30833FJFP#U5
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30833FJFP#U5M30833FJFP#U3
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
M30833FJFP#U5M30833FJFP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R
R
M
e
E
3
. v
J
Figure 10.15 IIO0IE to IIO11IE Registers
2
0
1
9
C
3 .
B
8 /
0
1
3
0
3
J
G
4
a
Interrupt Enable Register
Bit Symbols for the Interrupt Enable Register
BTiE
TMmjE
POijE
SIOiRE/SIOiTE
GmRIE/GmTOE
SRTm E
IEkE
CANkE
-
b7
0 -
n
o r
IIO10IE
Symbol
IIO11IE
3 .
IIO0IE
IIO1IE
IIO2IE
IIO3IE
IIO4IE
IIO5IE
IIO6IE
IIO7IE
IIO8IE
IIO9IE
1
u
b6
NOTES:
, 1
3
p
1
1. See table below for bit symbols.
2. If an interrupt request is used for interrupt, set bit 1 to 7 to "1" after the IRLT bit is set to "1".
2
(
b5
M
0
0
3
Address
b4
6
00BA
00BB
00B0
00B1
00B2
00B3
00B4
00B5
00B6
00B7
00B8
00B9
2
C
b3
: Intelligent I/O Group i Base Timer Interrupt Enable Bit (i=0 to 3)
: Intelligent I/O Group m Time Measurement j Interrupt Enable Bit (j=0 to 7)(m=0,1)
: Intelligent I/O Group i Waveform Generation Function j Interrupt Enable Bit
: Intelligent I/O Group i Communication Function Interrupt Enable Bit (RE:receive, TE:transmit)
: Intelligent I/O Group m HDLC Data Processing Function Interrupt Enable Bit
: Intelligent I/O Group m Special Communication Function Interrupt Enable Bit
: Intelligent I/O Group 2 IEBus Communication Function Interrupt Enable Bit (k=0 to 2)
: CAN Communication Function Interrupt Enable Bit
: Reserved bit. Set to "0".
8 /
Page 110
16
16
16
16
16
16
16
16
16
16
16
16
(RIE:input to receive, TOE:input to transmit)
, 3
b2
M
CAN0E
CAN1E
CAN2E
SRT 0E
b1
IE0E
IE1E
Bit 7
3
-
-
-
-
-
-
2
b0
C
f o
8 /
4
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
3
Symbol
8
IRLT
SRT 1E
) T
8
Bit
IE2E
Bit 6
Symbol
IIO0IE to IIO11IE
-
-
-
-
-
-
-
-
-
-
Interrupt Request
Select Bit
SIO0RE
SIO1RE
SIO0TE
SIO1TE
Bit 5
Bit Name
-
-
-
-
-
-
-
-
(2)
SIO2RE
SIO3RE
SIO2TE
SIO3TE
G0TOE
G1TOE
G0RIE
G1RIE
BT1E
BT0E
BT2E
BT3E
Bit 4
See below
Address
0 : Interrupt request is used for DMAC, DMAC II
1 : Interrupt request is used for interrupt
0 : Disables an interrupt by bit 1 in IIOiIR register
1 : Enables an interrupt by bit 1 in IIOiIR register
0 : Disables an interrupt by bit 2 in IIOiIR register
1 : Enables an interrupt by bit 2 in IIOiIR register
0 : Disables an interrupt by bit 3 in IIOiIR register
1 : Enables an interrupt by bit 3 in IIOiIR register
0 : Disables an interrupt by bit 4 in IIOiIR register
1 : Enables an interrupt by bit 4 in IIOiIR register
0 : Disables an interrupt by bit 5 in IIOiIR register
1 : Enables an interrupt by bit 5 in IIOiIR register
0 : Disables an interrupt by bit 6 in IIOiIR register
1 : Enables an interrupt by bit 6 in IIOiIR register
0 : Disables an interrupt by bit 7 in IIOiIR register
1 : Enables an interrupt by bit 7 in IIOiIR register
PO27E
PO32E
PO33E
PO34E
PO35E
PO36E
PO31E
PO30E
PO37E
Bit 3
-
-
-
TM12E/PO12E
TM17E/PO17E
PO13E
PO14E
PO10E
PO21E
PO20E
PO22E
PO23E
PO24E
PO25E
PO26E
Bit 2
After Reset
00
Function
16
TM00E/PO00E
TM04E/PO04E
TM05E/PO05E
TM16E/PO16E
TM01E/PO01E
TM11E/PO11E
TM02E
TM03E
TM06E
TM07E
PO15E
Bit 1
-
IRLT
IRLT
IRLT
IRLT
IRLT
IRLT
IRLT
IRLT
IRLT
IRLT
IRLT
IRLT
Bit 0
RW
RW
RW
RW
RW
RW
RW
RW
RW
10. Interrupts
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