M30833FJFP#U5 Renesas Electronics America, M30833FJFP#U5 Datasheet - Page 312
M30833FJFP#U5
Manufacturer Part Number
M30833FJFP#U5
Description
IC M32C/83 MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets
1.M3087BFLGPU3.pdf
(364 pages)
2.M30833FJGPU3.pdf
(96 pages)
3.M30833FJGPU3.pdf
(529 pages)
Specifications of M30833FJFP#U5
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30833FJFP#U5M30833FJFP#U3
Manufacturer:
Renesas Electronics America
Quantity:
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Part Number:
M30833FJFP#U5M30833FJFP#U3
Manufacturer:
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Quantity:
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Table 21.15 Parallel RTP Output Mode Specifications
Waveform Output Start Condition
Waveform Output Stop Condition
Interrupt Request
OUTCij Pin
Selectable Function
NOTES:
Figure 21.30 Parallel RTP Output Function Block Diagram
21.3.6 Parallel Real-Time Port Output Mode (Group 2 and 3)
1
C
9
3 .
B
The OUTCij pin outputs the value set by the GiRTP register in one-byte units when the value of the base
timer matches that of the GiPOj register (i=2 to 3, j=0 to 7). Table 21.15 lists specifications of the parallel
RTP output mode. Figure 21.30 shows a block diagram of the parallel RTP output function. Figure 21.31
shows an example of the parallel RTP output mode operation. (See Figure 21.7 for the G2BCR1 register
and Figure 21.8 for the G3BCR1 register.)
1. Set the GiPO0 register to 0001
8 /
0
1
3
0
register is set to "1", and the RST0 and RST2 bits are set to "0") while the values in the base timer and the GiPO0
register match
3
J
G
4
a
0 -
n
o r
3 .
1
u
, 1
3
p
Item
1
2
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0
0
3
6
2
C
Page 287
8 /
GiPO0 register
GiPO1 register
GiPO2 register
GiPO3 register
GiPO4 register
GiPO5 register
GiPO6 register
GiPO7 register
i=2 to 3
, 3
Base Timer
M
3
2
C
f o
8 /
4
16
3
8
The IFEj bit in the GiFE register (i=2 to 3, j=0 to 7) is set to "1" (channel j function
enabled)
The IFEj bit is set to "0" (channel j function disabled)
The POijR bit in the interrupt request register is set to "1" when value of the
base timer matches that of the GiPOj register (0000
Figure 10.14.)
RTP output
• Default value set function: Set starting waveform output level
• Inverse output function: Waveform output level is inversed and output from
) T
8
the OUTCij pin
to FFFD
16
when setting the base timer to "0000
GiRTP register
RTP0
RTP1
RTP2
RTP3
RTP4
RTP5
RTP6
RTP7
21. Intelligent I/O (Waveform Generation Function)
Specification
D Q
D Q
D Q
D Q
D Q
D Q
D Q
D Q
T
T
T
T
T
T
T
T
Real-time Port Output
OUTCi
OUTCi
OUTCi
OUTCi
OUTCi
OUTCi
OUTCi
OUTCi
16
" (the RST1 bit in the GiBCR1
16
0
1
2
3
4
5
6
7
to FFFF
16 (1)
). (See
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