M30833FJFP#U5 Renesas Electronics America, M30833FJFP#U5 Datasheet - Page 319
M30833FJFP#U5
Manufacturer Part Number
M30833FJFP#U5
Description
IC M32C/83 MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets
1.M3087BFLGPU3.pdf
(364 pages)
2.M30833FJGPU3.pdf
(96 pages)
3.M30833FJGPU3.pdf
(529 pages)
Specifications of M30833FJFP#U5
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30833FJFP#U5M30833FJFP#U3
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
M30833FJFP#U5M30833FJFP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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3
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2
Figure 21.37 G0IRF to G1IRF Registers and G0TB to G1TB Registers
9 0
. 1
C
B
1 3
8 /
0
3
3 0
Group i SI/O Special Communication Interrupt Detect Register (i=0,1)
J
b7
G
- 4
n a
NOTES:
o r
1 0
b6
Group i Transmit Buffer (Receive Data) Register (i=0,1)
3 .
b7
u
1. The GiETC register is used in special communication mode or HDLC data processing mode. Do not
2. The SRTiR bit in the IIO4IR register is set to "1" if the BSERR bit, ABT bit or the IRF0 to IRF3 bits is
, 1
1 3
p
b5
use in clock synchronous serial I/O mode or UART mode.
set to "0".
0 2
(
M
b4
6 0
3
2
b3
C
8 /
Page 294
b2
, 3
b1
M
NOTES:
3
b0
2
1. The GiTB register and the GiDR register share addresses.
C
f o
b0
(b1 - b0)
BSERR
Symbol
8 /
IRF0
IRF1
IRF2
IRF3
ABT
4
Bit
3
Symbol
G0IRF,G1IRF
Set data to be transmitted.
Values written in these registers are written to the GiTB register.
Data read from these registers in HDLC data processing mode are
values written in the GiDR register
8 8
) T
Symbol
G0TB,G0DR
G1TB,G1DR
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Bit Stuffing Error
Detect Flag
Arbitration Lost
Detect Flag
Interrupt Cause
Determination
Flag 0
Interrupt Cause
Determination
Flag 1
Interrupt Cause
Determination
Flag 2
Interrupt Cause
Determination
Flag 3
Bit Name
(2)
(2)
(2)
(2)
Address
00FE
16
21. Intelligent I/O (Group 0, 1 Communication Function)
, 013E
0 : The GiDR register (receive data register)
1 : The GiDR register matches the GiCMP0
0 : The GiDR register (receive data register)
1 : The GiDR register matches the GiCMP1
0 : The GiDR register (receive data register)
1 : The GiDR register matches the GiCMP2
0 : The GiDR register (receive data register)
1 : The GiDR register matches the GiCMP3
0 : Not detected
1 : Detected
0 : Not detected
1 : Detected
Address
00EA
012A
does not match the GiCMP0 register
register
does not match the GiCMP1 register
register
does not match the GiCMP2 register
register
does not match the GiCMP3 register
register
16
Function
16
16
Function
After Reset
0000 00XX
After Reset
Indeterminate
Indeterminate
2
(1)
RW
RW
RW
RW
RW
RW
RW
(1,2)
(RO)
WO
RW
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