MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 1015

• Manufacturer Part Number: MPC562MZP56
• Description: IC MPU 32BIT 56MHZ PPC 388-PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC562MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 22
• Operating Supply Voltage: 2.6 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No

24.8.3
A trace overrun error occurs when a trace message cannot be queued due to the queue being full, provided
program trace is enabled.
The overrun error causes the message queue to be flushed, and an error message to be queued. The error
code within the error message indicates that either a program/data/ownership trace overrun error has
occurred or that only a program trace overrun has occurred. The next BTM will be a synchronization
message. Refer to
The error message has the following format:
24.8.4
24.8.4.1
BTM is accomplished by capturing instruction fetch information from the U-bus and instruction execution
information from the RCPU (VF and VFLS signals), and combining them to generate program trace
messages.
Freescale Semiconductor
Queue Overflow Program Trace Error Message
Branch Trace Message Operation
BTM Capture and Encoding Algorithm
Table
A1
Previous Address (A1) = 0x0003 FC01, New Address (A2) = 0x0003 F365
Address Message (M1) = 1111 0110 0100
Figure 24-33. Relative Address Generation and Re-Creation
+
24-20.
Figure 24-34. Error Message (Queue Overflow) Format
M1 = A2
+
M1 = 0000 0000 0000 0000 0000 1111 0110 0100
A1 = 0000 0000 0000 0011 1111 1100 0000 0001
A2 = 0000 0000 0000 0011 1111 0011 0110 0101
+
MPC561/MPC563 Reference Manual, Rev. 1.2
M1 = 0000 0000 0000 0000 0000 1111 0110 0100
TCODE (8)
A2 = 0000 0000 0000 0011 1111 0011 0110 0101
A1 = 0000 0000 0000 0011 1111 1100 0000 0000
[6 bits]
Message Generation:
Address Re-Creation:
Length = 11 bits
Error Code (0b0 0000,
0b0 0001, 0b0 0010,
0b0 0111)
[5 bits]
READI Module
24-47