MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 1126

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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Internal Memory Map
B-16
1
0x30 4F00 –
0x30 4F7E
0x30 4F80 –
0x30 4FFE
0x30 5000
0x30 5002
0x30 5004
0x30 5006
0x30 5008
0x30 500A
0x30 500C
0x30 500E
0x30 5010 —
0x30 5012
0x30 5014
0x30 5016
0x30 5018
0x30 501A
0x30 501C
0x30 501E
Bit 3 (SSEx) is readable in test mode only.
Address
Address
Table B-10. QADC64E A and B (Queued Analog-to-Digital Converter) (continued)
Access
Access
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S
T
S
S
Table B-11. QSMCM (Queued Serial Multi-Channel Module)
QSMCMMCR
LJURR_B
QDSCI_IL
LJSRR_B
PQSPAR/
PORTQS
DDRQST
SCC1R0
SCC1R1
QSPI_IL
Symbol
Symbol
SC1DR
QTEST
SC1SR
SPCR0
SPCR1
SPCR2
SPCR3
MPC561/MPC563 Reference Manual, Rev. 1.2
Result Word Table.
Left-Justified, Signed Result Register.
Result Word Table.
Left-Justified, Unsigned Result Register.
QSMCM Module Configuration Register.
See
QSMCM Test Register
Dual SCI Interrupt Level.
See
Queued SPI Interrupt Level.
See
SCI1 Control Register 1.
See
SCI1 Control Register 1.
See
SCI1 Status Register.
See
SCI1 Data Register.
See
Reserved
QSMCM Port QS Data Register.
See
QSMCM Port QS PIn Assignment Register/
QSMCM Port QS Data Direction Register.
See
QSPI Control Register 0.
See
QSPI Control Register 1.
See
QSPI Control Register 2.
See
QSPI Control Register 3.
See
Table 15-4
Table 15-5
Table 15-6
Table 15-24
Table 15-25
Table 15-26
Table 15-27
Section 15.5.2
Section 15.5.2
Table 15-13
Table 15-15
Table 15-16
Table 15-17
QSMCM
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
Register
Register
for bit descriptions.
for bit descriptions.
Freescale Semiconductor
Size
Size
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
8
Reset
Reset
X
X
S
S
S
S
S
S
S
S
S
S
S
S
S
S

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