MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 1191

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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0
ADDRESS OFFSETS
1
0x30XXWA
0x30XXWC
0x30XXWE
0x30XXW0
0x30XXW2
0x30XXW4
0x30XXW6
0x30XXW8
2
0
0
0
3
1
1
1
0
0
cChannel Function Select
cHost Sequence
cHost Service Request
cChannel Priority
Channel Interrupt Enable
Channel Interrupt Status
= Written By RCPU
= Written By TPU
1. The TPU does not check the value of LINK_CHANNEL_COUNT. If this parameter is
2. MAX_COUNT may be written at any time by the host RCPU, but if the value written is
NAME
0
START_LINK_
not >0 and < 8, results are unpredictable.
< PERIOD_COUNT, a period or pulse-width accumulation is terminated. If this
happens, the number of periods over which the accumulation is performed will not
correspond to MAX_COUNT.
CHANNEL
1
MPC561/MPC563 Reference Manual, Rev. 1.2
2
MAX_COUNT
ACCUM_RATE
Figure D-24. PPWA Parameters
3
xxxx – PPWA Function Number
Assigned during microcode assembly. See
00 – Accumulate 24-Bit Periods, No Links
01 – Accumulate 16-Bit Periods, Links
10 – Accumulate 24-Bit Pulse Widths, No Links
11 – Accumulate 16-Bit Pulse Widths, Links
00 – Not Used
01 – Not Used
10 – Initialize
11 – Not Used
00 – Channel Disabled
01 – Low Priority
10 – Medium Priority
11 – High Priority
0 – Channel Interrupt Disabled
1 – Channel Interrupt Enabled
0 – Channel Interrupt Not Asserted
1 – Channel Interrupt Asserted
LINK_CHANNEL_
4
PARAMETER RAM
CONTROL BITS
COUNT
= Written by RCPU and TPU
= Unused Parameters
5
2
6
LAST_ACCUM
1
PPWA_LW
ACCUM
7
OPTIONS
BITS
8
9
CHANNEL_CONTROL
PERIOD_COUNT
10 11 12 13 14 15
PPWA_UB
W = Channel Number
For address offsets: XX =41 for
TPU_A, 45 for TPU_B
YY = 40 for TPU_A,
Table D-1
0x30YY1C – 0x30YY1E
0x30YY0C – 0x30YY12
0x30YY18 – 0x30YY1A
0x30YY14 – 0x30YY16
ADDRESSES
0x30YY0A
0x30YY20
TPU3 ROM Functions
Param 0
Param 1
Param 2
Param 3
Param 4
Param 5
Param 6
Param 7
D-39

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