MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 126

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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[PCS6EN]
PDMCR2
Signal Descriptions
2.5
On the MPC561/MPC563, the JTAG, BDM, and READI (Nexus interface) signals are all shared. Only one
set of signals can be active at a time.
2-28
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
[PCS7EN]
PDMCR2
MPC561/MPC563 Development Support Signal Sharing
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
TDO/DSDO/MDO0
1
TCK/DSCK/MCKI
Only one set of signals are enabled at a time.
TDI/DSDI/MDI0
JCOMP/RSTI
TMS/EVTI
PULL_
Signal
Table 2-12. MPC561/MPC563 Development Support Shared Signals
DIS5
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
[SH_ET1]
SHORT_
REG
Table 2-11. Enhanced PCS 6 & 7 Pad Function
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
MPC561/MPC563 Reference Manual, Rev. 1.2
[SH_ET2]
SHORT_
Table 2-12
Direction
Output
REG
Input
Input
Input
Input
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
ETRIG1/PCS6
PAD Function
shows the shared functions in the different modes.
ETRIG1
ETRIG1
ETRIG1
ETRIG1
ETRIG1
ETRIG1
ETRIG1
ETRIG1
PCS6
PCS6
PCS6
PCS6
PCS6
PCS6
PCS6
PCS6
JCOMP
JTAG
TDO
TMS
TCK
TDI
ETRIG2/PCS7
PAD Function
ETRIG2
ETRIG2
ETRIG2
ETRIG2
ETRIG2
ETRIG2
ETRIG2
ETRIG2
PCS7
PCS7
PCS7
PCS7
PCS7
PCS7
PCS7
PCS7
DSDO
DSCK
BDM
DSDI
0
Disabled
Disabled A_TPUCH15 B_TPUCH15
Disabled
Disabled A_TPUCH15 B_TPUCH15
Disabled
Disabled A_TPUCH15 B_TPUCH15
Disabled
Disabled A_TPUCH15 B_TPUCH15
Enabled
Enabled A_TPUCH15 B_TPUCH15
Enabled
Enabled A_TPUCH15 B_TPUCH15
Enabled
Enabled A_TPUCH15 B_TPUCH15
Enabled
Enabled A_TPUCH15 B_TPUCH15
Pull-up
Pad
connection
READI
MDO0
MCKI
Freescale Semiconductor
MDI0
RSTI
EVTI
ETRIG 1
internal
ETRIG1
ETRIG1
ETRIG1
ETRIG1
PCS6
PCS6
PCS6
PCS6
connection
ETRIG2
internal
ETRIG2
ETRIG2
ETRIG2
ETRIG2
PCS7
PCS7
PCS7
PCS7

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