MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 980

• Manufacturer Part Number: MPC562MZP56
• Description: IC MPU 32BIT 56MHZ PPC 388-PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC562MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 22
• Operating Supply Voltage: 2.6 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No

READI Module
24.6.1.6
The UBA register defines the memory map address for the OT register.
the register bits.
24-12
RCPU
Address
Bits
0
5
6
7
RSTI
Field
Nexus
User Base Address Register (UBA)
Bits
The MC register is not available prior to Revision D of the MPC561 and is
not available in Revision B and earlier versions of the MPC563. Prior
revisions have only the default features.
7
2
1
0
QTST
MSB
7
Name
PTSM
QTST
QFM
PTM
Figure 24-5. READI Mode Control (MC) Register
6
Enables a factory test mode for structural testing of the queue. This bit can only be
written in factory test mode. When set, no trace messages are queued.
Users should always write this bit as a 0.
The Program Trace Mode (PTM) bit enables an enhanced method of program trace.
This mode allows program trace to work with the ISCTL bits of the ICTRL register set
to any value except 3. The value of 2 is recommended for optimal processor
performance. The drawback of this mode is direct branch messages are never
syncronizing so sync requests must be held until the next indirect branch.
0 Legacy Program Trace Mode
1 Enhanced Program Trace Mode
The Queue Flush Mode (QFM) bit selects if information in the queue is discarded or
transmitted at the time of an overrun. Discarding information allows trace to resume
quicker after an overrun, but makes it difficult to find the cause of the overrun.
0 Information in the queue is removed
1 Trace is stopped until the queue empties.
The Program Trace Sync Mode (PTSM) indicates if the program trace messages
contain the I-CNT packet.
0 Program trace message do not contain the I-CNT packet.
1 Program trace message contain the I-CNT packet.
MPC561/MPC563 Reference Manual, Rev. 1.2
Table 24-9. MC Bit Descriptions
5
—
NOTE
4
0000_0000
0x0B
Description
3
Table 24-10
PTM
2
QFM
gives a description of
Freescale Semiconductor
1
PTSM
LSB
0