ATTINY4-TSHR Atmel, ATTINY4-TSHR Datasheet - Page 102
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ATTINY4-TSHR
Manufacturer Part Number
ATTINY4-TSHR
Description
IC MCU AVR 512B FLASH SOT-23-6
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY10-TSHR.pdf
(169 pages)
Specifications of ATTINY4-TSHR
Package / Case
SOT-23-6
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
12MHz
Number Of I /o
4
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
32 x 8
Program Memory Size
512B (512 x 8)
Oscillator Type
Internal
Peripherals
POR, PWM, WDT
Core Size
8-Bit
Controller Family/series
ATtiny
No. Of I/o's
4
Ram Memory Size
32Byte
Cpu Speed
12MHz
No. Of Timers
1
Rohs Compliant
Yes
Processor Series
ATTINY4x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
32 B
Interface Type
ISP
Maximum Clock Frequency
12 MHz
Number Of Programmable I/os
4
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Package
6SOT-23
Device Core
AVR
Family Name
ATtiny
Maximum Speed
12 MHz
Operating Supply Voltage
2.5|3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY4-TSHR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
14.4.1
14.4.2
102
ATtiny4/5/9/10
Message format
Exception Handling and Synchronisation
The TPI access layer controls the character transfer direction on the TPI physical layer. It also
handles the recovery from the error state after exception.
The Control and Status Space (CSS) of the Tiny Programming Interface is allocated for control
and status registers in the TPI access Layer. The CSS consist of registers directly involved in
the operation of the TPI itself. These register are accessible using the SLDCS and SSTCS
instructions.
The access layer can also access the data space, either directly or indirectly using the Pointer
Register (PR) as the address pointer. The data space is accessible using the SLD, SST, SIN
and SOUT instructions. The address pointer can be stored in the Pointer Register using the
SLDPR instruction.
Each message comprises an instruction followed by one or more byte operands. The instruction
is always sent by the external programmer. Depending on the instruction all the following oper-
ands are sent either by the external programmer or by the TPI.
The messages can be categorized in two types based on the instruction, as follows:
All the instructions except the SKEY instruction require the instruction to be followed by one byte
operand. The SKEY instruction requires 8 byte operands. For more information, see the TPI
instruction set on
Several situations are considered exceptions from normal operation of the TPI. When the TPI
physical layer is in receive mode, these exceptions are:
When the TPI physical layer is in transmit mode, the possible exceptions are:
All these exceptions are signalized to the TPI access layer. The access layer responds to an
exception by aborting any on-going operation and enters the error state. The access layer will
stay in the error state until a BREAK character has been received, after which it is taken back to
its default state. As a consequence, the external programmer can always synchronize the proto-
col by simply transmitting two successive BREAK characters.
• Write messages. A write message is a request to write data. The write message is sent
• Read messages. A read message is a request to read data. The TPI reacts to the request by
• The TPI physical layer detects a parity error.
• The TPI physical layer detects a frame error.
• The TPI physical layer recognizes a BREAK character.
• The TPI physical layer detects a data collision.
entirely by the external programmer. This message type is used with the SSTCS, SST,
STPR, SOUT and SKEY instructions.
sending the byte operands. This message type is used with the SLDCS, SLD and SIN
instructions.
page
103.
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