ATTINY20-XU Atmel, ATTINY20-XU Datasheet - Page 163
ATTINY20-XU
Manufacturer Part Number
ATTINY20-XU
Description
MCU AVR 2KB FLASH 12MHZ 14TSSOP
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY20-EK1.pdf
(224 pages)
Specifications of ATTINY20-XU
Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
ATtiny
Core
AVR
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
SPI, TWI
Maximum Clock Frequency
12 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY20-XU
Manufacturer:
Atmel
Quantity:
904
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19. Memory Programming
19.1
19.2
8235B–AVR–04/11
Features
Overview
•
•
•
•
•
•
The Non-Volatile Memory (NVM) Controller manages all access to the Non-Volatile Memories.
The NVM Controller controls all NVM timing and access privileges, and holds the status of the
NVM.
During normal execution the CPU will execute code from the code section of the Flash memory
(program memory). When entering sleep and no programming operations are active, the Flash
memory is disabled to minimize power consumption.
All NVM are mapped to the data memory. Application software can read the NVM from the
mapped locations of data memory using load instruction with indirect addressing.
The NVM has only one read port and, therefore, the next instruction and the data can not be
read simultaneously. When the application reads data from NVM locations mapped to the data
space, the data is read first before the next instruction is fetched. The CPU execution is here
delayed by one system clock cycle.
Internal programming operations to NVM have been disabled and the NVM therefore appears to
the application software as read-only. Internal write or erase operations of the NVM will not be
successful.
The method used by the external programmer for writing the Non-Volatile Memories is referred
to as external programming. External programming can be done both in-system or in mass pro-
duction. The external programmer can read and program the NVM via the Tiny Programming
Interface (TPI).
In the external programming mode all NVM can be read and programmed, except the signature
and the calibration sections which are read-only.
NVM can be programmed at 5V, only. See
Two Embedded Non-Volatile Memories:
Four Separate Sections Inside Flash Memory:
Read Access to All Non-Volatile Memories from Application Software
Read and Write Access to Non-Volatile Memories from External programmer:
External Programming:
High Security with NVM Lock Bits
– Non-Volatile Memory Lock bits (NVM Lock bits)
– Flash Memory
– Code Section (Program Memory)
– Signature Section
– Configuration Section
– Calibration Section
– Read Access to All Non-Volatile Memories
– Write Access to NVM Lock Bits, Flash Code Section and Flash Configuration Section
– Support for In-System and Mass Production Programming
– Programming Through the Tiny Programming Interface (TPI)
Table 20-9 on page
178.
ATtiny20
163
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