ATTINY20-CCUR Atmel, ATTINY20-CCUR Datasheet - Page 154
ATTINY20-CCUR
Manufacturer Part Number
ATTINY20-CCUR
Description
MCU AVR 2KB FLASH 12MHZ 15UFBGA
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY20-EK1.pdf
(224 pages)
Specifications of ATTINY20-CCUR
Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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18.3.4
18.3.5
18.3.6
154
ATtiny20
Parity Bit Calculation
Supported Characters
Operation
Figure 18-3. Serial frame format.
Symbols used in
The parity bit is always calculated using even parity. The value of the bit is calculated by doing
an exclusive-or of all the data bits, as follows:
where:
The BREAK character is equal to a 12 bit long low level. It can be extended beyond a bit-length
of 12.
The IDLE character is equal to a 12 bit long high level. It can be extended beyond a bit-length of
12.
Figure 18-4. Supported characters.
The TPI physical layer operates synchronously on the TPICLK provided by the external pro-
grammer. The dependency between the clock edges and data sampling or data change is
shown in
TPICLK
TPIDATA
TPIDATA
TPIDATA
TPIDATA
ST:
D0-D7: Data bits (least significant bit sent first)
P:
SP1:
SP2:
P = D0
P:
D0-D7:
Figure
IDLE
IDLE
IDLE
⊗
IDLE
Start bit (always low)
Parity bit (using even parity)
Stop bit 1 (always high)
Stop bit 2 (always high)
D1
18-5. Data is changed at falling edges and sampled at rising edges.
Figure
⊗
ST
ST
Parity bit using even parity
Data bits of the character
D2
18-3:
⊗
D3
D0
D0
⊗
D4
D1
D1
⊗
D5
DATA CHARACTER
BREAK CHARACTER
IDLE CHARACTER
⊗
D6
⊗
D7
D7
⊗
D7
0
P
P
SP1
SP1
SP2
SP2
8235B–AVR–04/11
IDLE/ST
IDLE/ST
IDLE/ST
IDLE/ST
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