ATTINY44-20MUR Atmel, ATTINY44-20MUR Datasheet - Page 36
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ATTINY44-20MUR
Manufacturer Part Number
ATTINY44-20MUR
Description
MCU AVR 4KB FLASH 20MHZ 20QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY24-20MU.pdf
(238 pages)
Specifications of ATTINY44-20MUR
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY44-20MUR
Manufacturer:
ATMEL
Quantity:
2 100
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7.4.3
7.4.4
7.4.5
7.4.6
7.5
7.5.1
36
Register Description
ATtiny24/44/84
Brown-out Detector
Internal Voltage Reference
Watchdog Timer
Port Pins
MCUCR – MCU Control Register
If the Brown-out Detector is not needed in the application, this module should be turned off. If the
Brown-out Detector is enabled by the BODLEVEL Fuses, it will be enabled in all sleep modes,
and hence, always consume power. In the deeper sleep modes, this will contribute significantly
to the total current consumption. See
able” on page 34
The Internal Voltage Reference will be enabled when needed by the Brown-out Detection, the
Analog Comparator or the ADC. If these modules are disabled as described in the sections
above, the internal voltage reference will be disabled and it will not be consuming power. When
turned on again, the user must allow the reference to start up before the output is used. If the
reference is kept on in sleep mode, the output can be used immediately. See
Reference” on page 42
If the Watchdog Timer is not needed in the application, this module should be turned off. If the
Watchdog Timer is enabled, it will be enabled in all sleep modes, and hence, always consume
power. In the deeper sleep modes, this will contribute significantly to the total current consump-
tion. See
When entering a sleep mode, all port pins should be configured to use minimum power. The
most important thing is then to ensure that no pins drive resistive loads. In sleep modes where
both the I/O clock (clk
will be disabled. This ensures that no power is consumed by the input logic when not needed. In
some cases, the input logic is needed for detecting wake-up conditions, and it will then be
enabled. See the section
which pins are enabled. If the input buffer is enabled and the input signal is left floating or has an
analog signal level close to V
For analog input pins, the digital input buffer should be disabled at all times. An analog signal
level close to V
input buffers can be disabled by writing to the Digital Input Disable Register (DIDR0). See
“DIDR0 – Digital Input Disable Register 0” on page 150
The MCU Control Register contains control bits for power management.
• Bit 7 – BODS: BOD Sleep
BOD disable functionality is available in some devices, only. See
In order to disable BOD during sleep (see
logic one. This is controlled by a timed sequence and the enable bit, BODSE in MCUCR. First,
Bit
Read/Write
Initial Value
“Watchdog Timer” on page 42
CC
BODS
R/W
7
0
for details on how to configure the Brown-out Detector.
/2 on an input pin can cause significant current even in active mode. Digital
I/O
for details on the start-up time.
) and the ADC clock (clk
PUD
R/W
6
0
“Digital Input Enable and Sleep Modes” on page 58
CC
/2, the input buffer will use excessive power.
R/W
SE
5
0
“Brown-out Detection” on page 41
for details on how to configure the Watchdog Timer.
Table 7-1 on page
SM1
R/W
4
0
ADC
) are stopped, the input buffers of the device
SM0
R/W
3
0
for details.
BODSE
33) the BODS bit must be written to
R/W
2
0
“Limitations” on page
ISC01
R/W
and
1
0
“Software BOD Dis-
ISC00
“Internal Voltage
R/W
0
0
for details on
8006K–AVR–10/10
35.
MCUCR
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