ATMEGA88A-MUR Atmel, ATMEGA88A-MUR Datasheet - Page 300

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ATMEGA88A-MUR

Manufacturer Part Number
ATMEGA88A-MUR
Description
IC MCU AVR 8K FLASH 32QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA88A-MUR

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
Part Number:
ATMEGA88A-MUR
Manufacturer:
RENESAS
Quantity:
4 152
27.2.1
27.3
8271C–AVR–08/10
Signature Bytes
Latching of Fuses
Table 27-9.
Note:
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if
Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the Lock bits.
The fuse values are latched when the device enters programming mode and changes of the
fuse values will have no effect until the part leaves Programming mode. This does not apply to
the EESAVE Fuse which will take effect once it is programmed. The fuses are also latched on
Power-up in Normal mode.
All Atmel microcontrollers have a three-byte signature code which identifies the device. This
code can be read in both serial and parallel mode, also when the device is locked. The three
b y t e s
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P the signature bytes are given in
10.
Table 27-10. Device ID
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
Low Fuse Byte
CKDIV8
CKOUT
SUT1
SUT0
CKSEL3
CKSEL2
CKSEL1
CKSEL0
Part
ATmega48A
ATmega48PA
ATmega88A
ATmega88PA
ATmega168A
1. The default value of SUT1...0 results in maximum start-up time for the default clock source.
2. The default setting of CKSEL3...0 results in internal RC Oscillator @ 8 MHz. See
3. The CKOUT Fuse allows the system clock to be output on PORTB0. See
4. See
(3)
(4)
See
on page 33
on page 35
r e s i d e
Fuse Low Byte
Table 8-12 on page 34
”System Clock Prescaler” on page 36
for details.
for details.
i n
Bit No
7
6
5
4
3
2
1
0
a
Signature Bytes Address
0x000
0x1E
0x1E
0x1E
0x1E
0x1E
for details.
Description
Divide clock by 8
Clock output
Select start-up time
Select start-up time
Select Clock source
Select Clock source
Select Clock source
Select Clock source
s e p a r a t e
for details.
a d d r e s s
0x001
0x92
0x92
0x93
0x93
0x94
Default Value
0 (programmed)
1 (unprogrammed)
1 (unprogrammed)
0 (programmed)
0 (programmed)
0 (programmed)
1 (unprogrammed)
0 (programmed)
s p a c e .
”Clock Output Buffer”
0x002
0x05
0x0A
0x0A
0x0F
0x06
(1)
(2)
(2)
(2)
F o r
(1)
(2)
Table 8-11
Table 27-
300
t h e

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