ATMEGA88-20MUR Atmel, ATMEGA88-20MUR Datasheet - Page 82

• Manufacturer Part Number: ATMEGA88-20MUR
• Description: MCU AVR 8K FLASH 20MHZ 32QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA88-20MUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 20MHz
• Interface Type: SPI/TWI/USART
• Total Internal Ram Size: 1KB
• # I/os (max): 23
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Package Type: MLF EP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

82
ATmega48/88/168
PCINT9: Pin Change Interrupt source 9. The PC1 pin can serve as an external interrupt source.
• ADC0/PCINT8 – Port C, Bit 0
PC0 can also be used as ADC input Channel 0. Note that ADC input channel 0 uses analog
power.
PCINT8: Pin Change Interrupt source 8. The PC0 pin can serve as an external interrupt source.
Table 13-7
shown in
Table 13-7.
Note:
Table 13-8.
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
1. When enabled, the 2-wire Serial Interface enables slew-rate controls on the output pins PC4
Figure 13-5 on page
PC6/RESET/PCINT14
RSTDISBL
1
RSTDISBL
0
0
0
RSTDISBL + PCINT14 •
PCIE1
RSTDISBL
PCINT14 INPUT
RESET INPUT
PC3/ADC3/
PCINT11
0
0
0
0
0
0
PCINT11 • PCIE1 +
ADC3D
PCINT11 • PCIE1
PCINT11 INPUT
ADC3 INPUT
and PC5. This is not shown in the figure. In addition, spike filters are connected between the
AIO outputs shown in the port figure and the digital logic of the TWI module.
and
Overriding Signals for Alternate Functions in PC6..PC4
Overriding Signals for Alternate Functions in PC3..PC0
Table 13-8
relate the alternate functions of Port C to the overriding signals
75.
PC2/ADC2/
PCINT10
0
0
0
0
0
0
PCINT10 • PCIE1 +
ADC2D
PCINT10 • PCIE1
PCINT10 INPUT
ADC2 INPUT
PC5/SCL/ADC5/PCINT13
TWEN
PORTC5 • PUD
TWEN
SCL_OUT
TWEN
0
PCINT13 • PCIE1 + ADC5D
PCINT13 • PCIE1
PCINT13 INPUT
ADC5 INPUT / SCL INPUT
PC1/ADC1/
PCINT9
0
0
0
0
0
0
PCINT9 • PCIE1 +
ADC1D
PCINT9 • PCIE1
PCINT9 INPUT
ADC1 INPUT
PC4/SDA/ADC4/PCINT12
TWEN
PORTC4 • PUD
TWEN
SDA_OUT
TWEN
0
PCINT12 • PCIE1 + ADC4D
PCINT12 • PCIE1
PCINT12 INPUT
ADC4 INPUT / SDA INPUT
(1)
PC0/ADC0/
PCINT8
0
0
0
0
0
0
PCINT8 • PCIE1 +
ADC0D
PCINT8 • PCIE1
PCINT8 INPUT
ADC0 INPUT
2545S–AVR–07/10