ATMEGA88P-20MUR Atmel, ATMEGA88P-20MUR Datasheet - Page 143

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ATMEGA88P-20MUR

Manufacturer Part Number
ATMEGA88P-20MUR
Description
MCU AVR 8KB FLASH 20MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA88P-20MUR

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
17.2.1
17.2.2
17.3
17.4
8025L–AVR–7/10
Timer/Counter Clock Sources
Counter Unit
Registers
Definitions
The Timer/Counter (TCNT2) and Output Compare Register (OCR2A and OCR2B) are 8-bit reg-
isters. Interrupt request (shorten as Int.Req.) signals are all visible in the Timer Interrupt Flag
Register (TIFR2). All interrupts are individually masked with the Timer Interrupt Mask Register
(TIMSK2). TIFR2 and TIMSK2 are not shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or asynchronously clocked from
the TOSC1/2 pins, as detailed later in this section. The asynchronous operation is controlled by
the Asynchronous Status Register (ASSR). The Clock Select logic block controls which clock
source he Timer/Counter uses to increment (or decrement) its value. The Timer/Counter is inac-
tive when no clock source is selected. The output from the Clock Select logic is referred to as the
timer clock (clk
The double buffered Output Compare Register (OCR2A and OCR2B) are compared with the
Timer/Counter value at all times. The result of the compare can be used by the Waveform Gen-
erator to generate a PWM or variable frequency output on the Output Compare pins (OC2A and
OC2B).
Compare Flag (OCF2A or OCF2B) which can be used to generate an Output Compare interrupt
request.
Many register and bit references in this document are written in general form. A lower case “n”
replaces the Timer/Counter number, in this case 2. However, when using the register or bit
defines in a program, the precise form must be used, i.e., TCNT2 for accessing Timer/Counter2
counter value and so on.
The definitions in
Table 17-1.
The Timer/Counter can be clocked by an internal synchronous or an external asynchronous
clock source. The clock source clk
bit in the ASSR Register is written to logic one, the clock source is taken from the Timer/Counter
Oscillator connected to TOSC1 and TOSC2. For details on asynchronous operation, see
– Asynchronous Status Register” on page
”Timer/Counter Prescaler” on page
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit.
17-2 on page 144
BOTTOM
MAX
TOP
See Section “17.5” on page 144.
Definitions
T2
The counter reaches the BOTTOM when it becomes zero (0x00).
The counter reaches its MAXimum when it becomes 0xFF (decimal 255).
The counter reaches the TOP when it becomes equal to the highest value in the
count sequence. The TOP value can be assigned to be the fixed value 0xFF
(MAX) or the value stored in the OCR2A Register. The assignment is depen-
dent on the mode of operation.
).
Table 17-1
shows a block diagram of the counter and its surrounding environment.
are also used extensively throughout the section.
T2
154.
is by default equal to the MCU clock, clk
for details. The compare match event will also set the
162. For details on clock sources and prescaler, see
ATmega48P/88P/168P
I/O
. When the AS2
”ASSR
Figure
143

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