ATA6617-P3QW Atmel, ATA6617-P3QW Datasheet - Page 73
ATA6617-P3QW
Manufacturer Part Number
ATA6617-P3QW
Description
MCU W/LIN TX/5V REG/WTCDG 38VQFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet
1.ATA6617-EK.pdf
(308 pages)
Specifications of ATA6617-P3QW
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
38-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATA6617-P3QW
Manufacturer:
ATMEL
Quantity:
3 500
Part Number:
ATA6617-P3QW
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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4.7.1.3
4.7.1.4
9132D–AUTO–12/10
Power-on Reset
External Reset
A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detection
level is defined in
detection level. The POR circuit can be used to trigger the start-up Reset, as well as to detect
a failure in supply voltage.
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the
Power-on Reset threshold voltage invokes the delay counter, which determines how long the
device is kept in RESET after Vcc rise. The RESET signal is activated again, without any
delay, when Vcc decreases below the detection level.
Figure 4-17. MCU Start-up, RESET Tied to Vcc
Figure 4-18. MCU Start-up, RESET Extended Externally
An External Reset is generated by a low level on the RESET pin. Reset pulses longer than the
minimum pulse width (see
not running. Shorter pulses are not guaranteed to generate a reset. When the applied signal
reaches the Reset Threshold Voltage – V
the MCU after the Time-out period – t
by the RSTDISBL fuse, see
INTERNAL
INTERNAL
TIME-OUT
TIME-OUT
RESET
RESET
RESET
V
V
CC
CC
Table 4-84 on page
V
CCRR
V
CCRR
Table 4-83 on page
Table 4-70 on page
V
PORMIN
V
V
POT
POR
V
PORMAX
TOUT
t
TOUT
270. The POR is activated whenever Vcc is below the
RST
– has expired. The External Reset can be disabled
Atmel ATA6616/ATA6617
– on its positive edge, the delay counter starts
270) will generate a reset, even if the clock is
251.
V
RST
t
TOUT
73
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