PIC24F16KA102-I/SS Microchip Technology, PIC24F16KA102-I/SS Datasheet - Page 199

IC PIC MCU FLASH 16K 28-SSOP

PIC24F16KA102-I/SS

Manufacturer Part Number
PIC24F16KA102-I/SS
Description
IC PIC MCU FLASH 16K 28-SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr

Specifications of PIC24F16KA102-I/SS

Program Memory Type
FLASH
Program Memory Size
16KB (5.5K x 24)
Package / Case
28-SSOP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
512 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24F
Core
PIC
Data Bus Width
16 bit
Data Ram Size
1.5 KB
Interface Type
I2C/IrDA/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
24
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA240017 - MODULE PLUG-IN PIC24F16KA102 PIM
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
26.3
In PIC24F16KA102 family devices, in addition to the
WDT module, a DSWDT module is present which runs
while the device is in Deep Sleep, if enabled. It is
driven by either the SOSC or LPRC oscillator. The
clock source is selected by the Configuration bit,
DSWCKSEL (FDS<4>).
The DSWDT can be configured to generate a time-out
at 2.1 ms to 25.7 days by selecting the respective
postscaler. The postscaler can be selected by the
Configuration
When the DSWDT is enabled, the clock source is also
enabled.
DSWDT is one of the sources that can wake-up the
device from Deep Sleep mode.
26.4
For all devices in the PIC24F16KA102 family, code
protection for the boot segment is controlled by the
Configuration bit, BSS0, and the general segment by
the Configuration bit, GSS0. These bits inhibit external
reads and writes to the program memory space; this
has no direct effect in normal execution mode.
Write protection is controlled by bit, BWRP, for the boot
segment and bit, GWRP, for the general segment in the
Configuration Word. When these bits are programmed
to ‘0’, internal write and erase operations to program
memory are blocked.
© 2009 Microchip Technology Inc.
Deep Sleep Watchdog Timer
(DSWDT)
Program Verification and
Code Protection
bits,
DSWDTPS<3:0>
(FDS<3:0>).
Preliminary
PIC24F16KA102 FAMILY
26.5
PIC24F16KA102 family microcontrollers can be
serially programmed while in the end application circuit.
This is simply done with two lines for clock (PGCx) and
data (PGDx) and three other lines for power, ground
and the programming voltage. This allows customers to
manufacture boards with unprogrammed devices and
then program the microcontroller just before shipping
the product. This also allows the most recent firmware
or a custom firmware to be programmed.
26.6
When MPLAB
in-circuit debugging functionality is enabled. This
function allows simple debugging functions when used
with MPLAB IDE. Debugging functionality is controlled
through the EMUCx (Emulation/Debug Clock) and
EMUDx (Emulation/Debug Data) pins.
To use the in-circuit debugger function of the device,
the design must implement ICSP connections to
MCLR,
EMUDx/EMUCx pin pair. In addition, when the feature
is enabled, some of the resources are not available for
general use. These resources include the first 80 bytes
of data RAM and two I/O pins.
In-Circuit Serial Programming
In-Circuit Debugger
V
DD
,
®
ICD 2 is selected as a debugger, the
V
SS
,
PGCx,
PGDx
DS39927B-page 197
and
the

Related parts for PIC24F16KA102-I/SS