PIC16F818-I/P Microchip Technology, PIC16F818-I/P Datasheet - Page 104

• Manufacturer Part Number: PIC16F818-I/P
• Description: IC MCU FLASH 1KX14 18-DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F818-I/P

• Program Memory Type: FLASH
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 18-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: I2C/SPI/SSP
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ACICE0202 - ADAPTER MPLABICE 18P 300 MILAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PICmicro MID-RANGE MCU FAMILY
Figure 6-5:
DS31006A-page 6-10
Note 1: Registers in BOLD will be present in every device.
2: Not all locations may be implemented. Unimplemented locations will read as '0'.
3: These locations may not be implemented. Depending on the device, accesses to the unimplemented loca-
4: Some device do not map these registers into Bank0. In devices where these registers are mapped into
5: Some devices may not implement these banks. Locations in unimplemented banks will read as ’0’.
6: General Purpose Registers (GPRs) may be located in the Special Function Register (SFR) area.
Registers
CCP1CON
CCP2CON
SSPCON
CCPR1H
CCPR2H
ADCON0
PCLATH
SSPBUF
CCPR1L
CCPR2L
STATUS
INTCON
Purpose
RCREG
General
PORTB
PORTC
PORTD
PORTE
TMR1H
T1CON
T2CON
TXREG
ADRES
PORTA
TMR1L
RCSTA
tions operate differently. Please refer to the specific device data sheet for details.
Bank0, these registers are referred to as common RAM
Bank0
TMR0
TMR2
INDF
PIR1
PIR2
PCL
FSR
Register File Map
(2)
File
Address
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
20h
7Fh
OPTION_REG
Registers
70h - 7Fh
Mapped in
OSCCAL
SSPATAT
ADCON1
PCLATH
SSPADD
STATUS
INTCON
Purpose
SPBRG
General
TXSTA
TRISC
TRISD
TRISA
TRISB
TRISE
PCON
Bank0
Bank1
INDF
PIE1
PIE2
PCL
FSR
PR2
(3)
(4)
File
Address
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
A0h
EFh
F0h
FFh
70h - 7Fh
Registers
Mapped in
Bank2
PCLATH
STATUS
INTCON
Purpose
PORTG
General
PORTB
PORTF
Bank0
TMR0
INDF
PCL
FSR
(5)
(3)
(4)
File
Address
100h
101h
102h
103h
104h
105h
109h
10Ah
10Bh
10Ch
10Dh
10Eh
10Fh
110h
111h
112h
113h
114h
115h
116h
117h
118h
119h
11Ah
11Bh
11Ch
11Dh
11Eh
11Fh
120h
16Fh
170h
17Fh
106h
107h
108h
1997 Microchip Technology Inc.
OPTION_REG 181h
Registers
70h - 7Fh
Mapped in
Bank3
PCLATH
STATUS
INTCON
Purpose
General
TRISG
TRISB
TRISF
Bank0
INDF
PCL
FSR
(5)
(3)
(4)
File
Address
180h
182h
183h
184h
185h
186h
187h
188h
189h
18Ah
18Bh
18Ch
18Dh
18Eh
18Fh
190h
191h
192h
193h
194h
195h
196h
197h
198h
199h
19Ah
19Bh
19Ch
19Dh
19Eh
19Fh
1A0h
1EFh
1F0h
1FFh