PIC16F818-I/P Microchip Technology, PIC16F818-I/P Datasheet - Page 115

• Manufacturer Part Number: PIC16F818-I/P
• Description: IC MCU FLASH 1KX14 18-DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F818-I/P

• Program Memory Type: FLASH
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 18-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: I2C/SPI/SSP
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ACICE0202 - ADAPTER MPLABICE 18P 300 MILAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

7.2
1997 Microchip Technology Inc.
Control Register
bit 7:5
bit 4
bit 3
bit 2
bit 1
bit 0
Register 7-1: EECON1 Register
bit 7
Unimplemented: Read as '0'
EEIF: EEPROM Write Operation Interrupt Flag bit
1 = The write operation completed (must be cleared in software)
0 = The write operation is not complete or has not been started
WRERR: EEPROM Error Flag bit
1 = A write operation is prematurely terminated
0 = The write operation completed
WREN: EEPROM Write Enable bit
1 = Allows write cycles
0 = Inhibits write to the data EEPROM
WR: Write Control bit
1 = initiates a write cycle. The bit is cleared by hardware once write is complete.
0 = Write cycle to the data EEPROM is complete
RD: Read Control bit
1 = Initiates an EEPROM read. Read takes one cycle. RD is cleared in hardware.
0 = Does not initiate an EEPROM read
Legend
R = Readable bit
U = Unimplemented bit, read as ‘0’
Note 1: Future devices will have this bit in the PIR register.
U-0
The WR bit can only be set (not cleared) in software.
The RD bit can only be set (not cleared) in software.
(any MCLR reset or any WDT reset during normal operation)
—
U-0
—
W = Writable bit
U-0
Section 7. Data EEPROM
—
EEIF
R/W-1
(1)
S = Settable bit
- n = Value at POR reset
WRERR
R/W-1
WREN
R/W-x
R/S-0
WR
DS31007A-page 7-3
bit 0
R/S-x
RD
7