PIC16F818-I/P Microchip Technology, PIC16F818-I/P Datasheet - Page 461

IC MCU FLASH 1KX14 18-DIP

PIC16F818-I/P

Manufacturer Part Number
PIC16F818-I/P
Description
IC MCU FLASH 1KX14 18-DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F818-I/P

Program Memory Type
FLASH
Program Memory Size
1.75KB (1K x 14)
Package / Case
18-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
I2C/SPI/SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
Minimum Operating Temperature
- 40 C
On-chip Adc
5-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ACICE0202 - ADAPTER MPLABICE 18P 300 MILAC164010 - MODULE SKT PROMATEII DIP/SOIC
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F818-I/P
Manufacturer:
Microchip Technology
Quantity:
295
25.2
1997 Microchip Technology Inc.
Control Register
bit 7
bit 6
bit 5
bit 4
bit 3:2
bit 1:0
Register 25-1: LCDCON Register
bit 7
LCDEN: Module Drive Enable bit
1 = LCD drive enabled
0 = LCD drive disabled
SLPEN: LCD Display Sleep Enable bit
1 = LCD module will stop operating during SLEEP
0 = LCD module will continue to display during SLEEP
Unimplemented: Read as '0'
VGEN: Voltage Generator Enable bit
1 = Internal LCD Voltage Generator Enabled, (powered-up)
0 = Internal LCD Voltage Generator powered-down, voltage is expected to be
CS1:CS0: Clock Source Select bits
00 = Fosc/256
01 = T1CKI (Timer1)
1x = Internal RC oscillator
LMUX1:LMUX0: Common Selection bits
Specifies the number of commons and the bias method
Legend
R = Readable bit
U = Unimplemented bit, read as ‘0’
LCDEN
R/W-0
LMUX1:LMUX0
provided externally
00
01
10
11
SLPEN
R/W-0
Static
1/2
1/3
1/4
W = Writable bit
U-0
MULTIPLEX
(COM0)
(COM0, 1)
(COM0, 1, 2)
(COM0, 1, 2, 3)
R/W-0
VGEN
- n = Value at POR reset
R/W-0
Section 25. LCD
CS1
Static
BIAS
1/3
1/3
1/3
R/W-0
CS0
Max # of Segments
LMUX1
R/W-0
DS31025A-page 25-3
32
31
30
29
bit 0
LMUX0
R/W-0
25

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