PIC16F818-I/P Microchip Technology, PIC16F818-I/P Datasheet
PIC16F818-I/P
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PIC16F818-I/P Summary of contents
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... Enhanced Flash Microcontrollers 2004 Microchip Technology Inc. PIC16F818/819 Data Sheet with nanoWatt Technology 18/20-Pin DS39598E ...
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... PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... Synchronous Serial Port (SSP) with 2 SPI™ (Master/Slave) and I C™ (Slave) Program Memory Device Flash # Single-Word (Bytes) Instructions PIC16F818 1792 1024 PIC16F819 3584 2048 2004 Microchip Technology Inc. PIC16F818/819 Pin Diagram 18-Pin PDIP, SOIC RA2/AN2/V - REF RA3/AN3/V + REF RA4/AN4/T0CKI RA5/MCLR RB0/INT RB1/SDI/SDA RB2/SDO/CCP1 ...
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... RB7/T1OSI/PGD 7 RB1/SDI/SDA 12 RB6/T1OSO/T1CKI/PGC 8 RB2/SDO/CCP1 11 RB5/SS 9 RB3/CCP1/PGM 10 RB4/SCK/SCL 28-Pin QFN RA5/MCLR RB0/INT DS39598E-page 2 20-Pin SSOP RA2/AN2/V - REF RA3/AN3/V + REF RA4/AN4/T0CKI RA5/MCLR RB0/INT RB1/SDI/SDA RB2/SDO/CCP1 RB3/CCP1/PGM PIC16F818/819 RA1/AN1 2 RA0/AN0 RA7/OSC1/CLKI 4 17 RA6/OSC2/CLKO RB7/T1OSI/PGD 8 RB6/T1OSO/T1CKI/PGC 13 RB5/ RB4/SCK/SCL 11 RA7/OSC1/CLKI RA6/OSC2/CLKO RB7/T1OSI/PGD RB6/T1OSO/T1CKI/PGC 2004 Microchip Technology Inc. ...
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... On-Line Support................................................................................................................................................................................. 171 Systems Information and Upgrade Hot Line ...................................................................................................................................... 171 Reader Response .............................................................................................................................................................................. 172 PIC16F818/819 Product Identification System .................................................................................................................................. 173 TO OUR VALUED CUSTOMERS It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced ...
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... PIC16F818/819 NOTES: DS39598E-page 4 2004 Microchip Technology Inc. ...
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... DEVICE OVERVIEW This document contains device specific information for the operation of the PIC16F818/819 devices. Additional information may be found in the “PICmicro MCU Family Reference Manual” (DS33023) which may be downloaded from the Microchip web site. The Reference Manual should be considered a complemen- ...
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... PIC16F818/819 FIGURE 1-1: PIC16F818/819 BLOCK DIAGRAM 13 Program Counter Flash Program Memory 8-Level Stack 1K/ Program 14 Bus Instruction reg Direct Addr 8 Instruction Start-up Timer Decode & Control Timing Watchdog Generation RA7/OSC1/CLKI Brown-out RA6/OSC2/CLKO MCLR Timer0 Timer1 Synchronous 10-bit, 5-channel A/D Serial Port Note 1: Higher order bits are from the Status register ...
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... TABLE 1-2: PIC16F818/819 PINOUT DESCRIPTIONS PDIP/ SSOP Pin Name SOIC Pin# Pin# RA0/AN0 17 19 RA0 AN0 RA1/AN1 18 20 RA1 AN1 RA2/AN2 REF RA2 AN2 V - REF RA3/AN3 REF RA3 AN3 V + REF RA4/AN4/T0CKI 3 3 RA4 AN4 T0CKI RA5/MCLR RA5 MCLR V PP RA6/OSC2/CLKO 15 17 ...
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... PIC16F818/819 TABLE 1-2: PIC16F818/819 PINOUT DESCRIPTIONS (CONTINUED) PDIP/ SSOP Pin Name SOIC Pin# Pin# RB0/INT 6 7 RB0 INT RB1/SDI/SDA 7 8 RB1 SDI SDA RB2/SDO/CCP1 8 9 RB2 SDO CCP1 RB3/CCP1/PGM 9 10 RB3 CCP1 PGM RB4/SCK/SCL 10 11 RB4 SCK SCL RB5/ RB5 SS RB6/T1OSO/T1CKI/PGC ...
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... PIC16F818/819 2.1 Program Memory Organization The PIC16F818/819 devices have a 13-bit program counter capable of addressing program memory space. For the PIC16F818, the first (0000h-03FFh) is Figure 2-1). For the PIC16F819, the first located at 0000h-07FFh (see Figure 2-2). Accessing a location above the physically implemented address will cause a wraparound ...
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... PIC16F818/819 2.2 Data Memory Organization The data memory is partitioned into multiple banks that contain the General Purpose Registers and the Special Function Registers. Bits RP1 (Status<6>) and RP0 (Status<5>) are the bank select bits. RP1:RP0 DS39598E-page 10 Each bank extends up to 7Fh (128 bytes). The lower locations of each bank are reserved for the Special Function Registers ...
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... FIGURE 2-3: PIC16F818 REGISTER FILE MAP File Address Indirect addr.(*) Indirect addr.(*) 00h TMR0 01h OPTION_REG 02h PCL 03h STATUS 04h FSR PORTA 05h 06h PORTB 07h 08h 09h 0Ah PCLATH 0Bh INTCON PIR1 0Ch 0Dh PIR2 0Eh TMR1L 0Fh TMR1H ...
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... PIC16F818/819 FIGURE 2-4: PIC16F819 REGISTER FILE MAP File Address Indirect addr.(*) Indirect addr.(*) 00h TMR0 01h OPTION_REG 02h PCL 03h STATUS 04h FSR PORTA 05h 06h PORTB 07h 08h 09h 0Ah PCLATH 0Bh INTCON PIR1 0Ch 0Dh PIR2 0Eh TMR1L 0Fh ...
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... T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TOUTPS1 TOUTPS0 TMR2ON SSPEN CKP SSPM3 SSPM2 CCP1X CCP1Y CCP1M3 CCP1M2 CHS2 CHS1 CHS0 GO/DONE PIC16F818/819 Value on Details on Bit 1 Bit 0 POR, BOR page: 23 0000 0000 53, 17 xxxx xxxx 23 0000 0000 0001 1xxx 23 xxxx xxxx 39 xxx0 0000 ...
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... PIC16F818/819 TABLE 2-1: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED) Address Name Bit 7 Bit 6 Bank 1 (1) 80h INDF Addressing this location uses contents of FSR to address data memory (not a physical register) 81h OPTION_REG RBPU INTEDG (1) 82h PCL Program Counter’s (PC) Least Significant Byte (1) 83h ...
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... T0CS T0SE PSA PS2 RP0 — Write Buffer for the upper 5 bits of the Program Counter TMR0IE INTE RBIE TMR0IF — FREE WRERR WREN PIC16F818/819 Value on Details on Bit 1 Bit 0 POR, BOR page: 23 0000 0000 53 xxxx xxxx 23 0000 0000 0001 1xxx 23 xxxx xxxx — ...
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... PIC16F818/819 2.2.2.1 Status Register The Status register, shown in Register 2-1, contains the arithmetic status of the ALU, the Reset status and the bank select bits for data memory. The Status register can be the destination for any instruction, as with any other register. If the Status ...
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... Legend Readable bit -n = Value at POR 2004 Microchip Technology Inc. PIC16F818/819 Note: To achieve a 1:1 prescaler assignment for the TMR0 register, assign the prescaler to the Watchdog Timer. R/W-1 R/W-1 R/W-1 R/W-1 T0CS T0SE PSA PS2 ...
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... PIC16F818/819 2.2.2.3 INTCON Register The INTCON register is a readable and writable regis- ter that contains various enable and flag bits for the TMR0 register overflow, RB port change and external RB0/INT pin interrupts. REGISTER 2-3: INTCON: INTERRUPT CONTROL REGISTER (ADDRESS 0Bh, 8Bh, 10Bh, 18Bh) ...
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... Disables the TMR2 to PR2 match interrupt bit 0 TMR1IE: TMR1 Overflow Interrupt Enable bit 1 = Enables the TMR1 overflow interrupt 0 = Disables the TMR1 overflow interrupt Legend Readable bit -n = Value at POR 2004 Microchip Technology Inc. PIC16F818/819 U-0 U-0 R/W-0 R/W-0 — — SSPIE CCP1IE W = Writable bit U = Unimplemented bit, read as ‘ ...
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... PIC16F818/819 2.2.2.5 PIR1 Register This register contains the individual flag bits for the peripheral interrupts. REGISTER 2-5: PIR1: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 1 (ADDRESS 0Ch) U-0 R/W-0 — ADIF bit 7 bit 7 Unimplemented: Read as ‘0’ bit 6 ADIF: A/D Converter Interrupt Flag bit ...
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... U-0 U-0 R/W-0 U-0 — — EEIF — Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared PIC16F818/819 U-0 U-0 U-0 — — — bit Bit is unknown U-0 U-0 U-0 — — ...
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... PIC16F818/819 2.2.2.8 PCON Register Note: Interrupt flag bits get set when an interrupt condition occurs regardless of the state of its corresponding enable bit or the Global Interrupt Enable bit, GIE (INTCON<7>). User software should ensure the appropri- ate interrupt flag bits are clear prior to enabling an interrupt ...
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... AN556, “Implementing a Table Read” (DS00556). 2.3.2 STACK The PIC16F818/819 family has an 8-level deep x 13-bit wide hardware stack. The stack space is not part of either program or data space and the Stack Pointer is not readable or writable. The PC is PUSHed onto the stack when a CALL instruction is executed or an interrupt causes a branch ...
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... PIC16F818/819 FIGURE 2-6: DIRECT/INDIRECT ADDRESSING Direct Addressing From Opcode RP1:RP0 6 Bank Select Location Select 00h Data (1) Memory 7Fh Bank 0 Note 1: For register file map detail, see Figure 2-3 or Figure 2-4. DS39598E-page 24 0 IRP Bank Select 80h 100h 180h FFh 17Fh 1FFh ...
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... EEPROM location being accessed. These devices have words of program Flash, with an address range from 0000h to 03FFh for the PIC16F818 and 0000h to 07FFh for the PIC16F819. Addresses above the range of the respec- tive device will wraparound to the beginning of program memory ...
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... PIC16F818/819 REGISTER 3-1: EECON1: EEPROM ACCESS CONTROL REGISTER 1 (ADDRESS 18Ch) R/W-x EEPGD bit 7 bit 7 EEPGD: Program/Data EEPROM Select bit 1 = Accesses program memory 0 = Accesses data memory Reads ‘0’ after a POR; this bit cannot be changed while a write operation is in progress. bit 6-5 Unimplemented: Read as ‘ ...
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... Interrupt Flag bit (EEIF) is set. The user can either enable this interrupt or poll this bit. EEIF must be cleared by software. 2004 Microchip Technology Inc. PIC16F818/819 The steps to write to EEPROM data memory are step 10 is not implemented, check the WR bit to see if a write is in progress. ...
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... PIC16F818/819 3.5 Reading Flash Program Memory To read a program memory location, the user must write two bytes of the address to the EEADR and EEADRH registers, set the EEPGD control bit (EECON1<7>) and then set control (EECON1<0>). Once the read control bit is set, the program memory Flash controller will use the second instruction cycle to read the data ...
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... NOP NOP BCF EECON1, FREE BCF EECON1, WREN BSF INTCON, GIE 2004 Microchip Technology Inc. PIC16F818/819 ; Select Bank of EEADRH ; ; MS Byte of Program Address to Erase ; ; LS Byte of Program Address to Erase ; Select Bank of EECON1 ; Point to PROGRAM memory ; Enable Write to memory ; Enable Row Erase operation ...
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... PIC16F818/819 3.7 Writing to Flash Program Memory Flash program memory may only be written to if the destination address segment of memory that is not write-protected, as defined in bits WRT1:WRT0 of the device Configuration Word (Register 12-1). Flash program memory must be written in four-word blocks. A block consists of four words with sequential addresses, with a lower boundary defined by an address, where EEADR< ...
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... GOTO loop BANKSEL EECON1 BCF EECON1, WREN BSF INTCON, GIE 2004 Microchip Technology Inc. PIC16F818/819 ;prepare for WRITE procedure ;point to program memory ;allow write cycles ;perform write only ;prepare for 4 words to be written ;Start writing at 0x100 ;load HIGH address ;load LOW address ...
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... PIC16F818/819 3.8 Protection Against Spurious Write There are conditions when the device should not write to the data EEPROM memory. To protect against spurious EEPROM writes, various mechanisms have been built-in. On power-up, WREN is cleared. Also, the Power-up Timer (72 ms duration) EEPROM write. The write initiate sequence and the WREN bit together help prevent an accidental write during brown-out, power glitch or software malfunction ...
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... OSCILLATOR CONFIGURATIONS 4.1 Oscillator Types The PIC16F818/819 can be operated in eight different oscillator modes. The user can program three configu- ration bits (FOSC2:FOSC0) to select one of these eight modes (modes 5-8 are new PIC16 oscillator configurations Low-Power Crystal 2. XT Crystal/Resonator 3. HS High-Speed Crystal/Resonator 4 ...
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... PORTA (RA6). Figure 4-3 shows the pin connections for the ECIO Oscillator mode. To Internal Logic FIGURE 4-3: Clock from Ext. System OSC2 for which the EXTERNAL CLOCK INPUT OPERATION (ECIO CONFIGURATION) OSC1/CLKI PIC16F818/819 I/O (OSC2) RA6 2004 Microchip Technology Inc. ...
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... EXT 2004 Microchip Technology Inc. PIC16F818/819 4.5 Internal Oscillator Block The PIC16F818/819 devices include an internal oscillator block which generates two different clock signals; either can be used as the system’s clock ) source. This can eliminate the need for external EXT oscillator circuits on the OSC1 and/or OSC2 pins ...
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... PIC16F818/819 4.5.2 OSCTUNE REGISTER The internal oscillator’s output has been calibrated at the factory but can be adjusted in the application. This is done by writing to the OSCTUNE register (Register 4-1). The tuning sensitivity is constant throughout the tuning range. The OSCTUNE register has a tuning range of ± ...
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... IRCF bits to a frequency that may be out of the V ification range; for example, V and IRCF = 111 (8 MHz). 2004 Microchip Technology Inc. PIC16F818/819 4.5.5 CLOCK TRANSITION SEQUENCE WHEN THE IRCF BITS ARE MODIFIED Following are three different sequences for switching the internal RC oscillator frequency. • ...
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... PIC16F818/819 FIGURE 4-6: PIC16F818/819 CLOCK DIAGRAM OSC2 Sleep OSC1 Internal Oscillator Block 31.25 kHz Source 31.25 kHz (INTRC) REGISTER 4-2: OSCCON: OSCILLATOR CONTROL REGISTER (ADDRESS 8Fh) U-0 R/W-0 — IRCF2 bit 7 bit 7 Unimplemented: Read as ‘0’ bit 6-4 IRCF2:IRCF0: Internal Oscillator Frequency Select bits ...
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... Bit 1 RA5 RA4 RA3 RA2 RA1 (1) PORTA Data Direction Register — — PCFG3 PCFG2 PCFG1 PIC16F818/819 pin is a Schmitt Trigger input. PP REF INITIALIZING PORTA ; select bank of PORTA ; Initialize PORTA by ; clearing output ; data latches ; Select Bank of ADCON1 ; Configure all pins ; as digital inputs ...
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... PIC16F818/819 FIGURE 5-1: BLOCK DIAGRAM OF RA0/AN0:RA1/AN1 PINS Data Bus PORTA CK Q Data Latch TRISA CK Q TRIS Latch V Analog Input Mode Input Buffer RD TRISA PORTA To A/D Module Channel Input FIGURE 5-2: BLOCK DIAGRAM OF RA3/AN3/V REF Data Bus PORTA CK Q Data Latch TRISA ...
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... Note 1: I/O pins have protection diodes CLKO signal is 1/4 of the F 2004 Microchip Technology Inc. PIN PP MCLR Filter SS Schmitt Trigger Input Buffer From OSC1 Oscillator Circuit 1x0,011) OSC Schmitt Trigger Input Buffer 1x0,011) OSC and frequency. OSC PIC16F818/819 Schmitt Trigger Buffer RA5/MCLR MCLRE V DD RA6/OSC2/CLKO DS39598E-page 41 ...
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... PIC16F818/819 FIGURE 5-7: BLOCK DIAGRAM OF RA7/OSC1/CLKI PIN From OSC2 Data Bus PORTA Q CK Data Latch TRISA CK Q TRIS Latch RD TRISA Q RD PORTA Note 1: I/O pins have protection diodes to V DS39598E-page 42 Oscillator Circuit (F = 011) OSC 10x OSC V SS Schmitt Trigger Input Buffer ...
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... Any read or write of PORTB. This will end the mismatch condition. b) Clear flag bit RBIF. 2004 Microchip Technology Inc. PIC16F818/819 A mismatch condition will continue to set flag bit RBIF. Reading PORTB will end the mismatch condition and allow flag bit RBIF to be cleared. The interrupt-on-change feature is recommended for ...
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... PIC16F818/819 TABLE 5-3: PORTB FUNCTIONS Name Bit# Buffer RB0/INT bit 0 TTL/ST RB1/SDI/SDA bit 1 TTL/ST RB2/SDO/CCP1 bit 2 TTL/ST (3) RB3/CCP1/PGM bit 3 TTL/ST RB4/SCK/SCL bit 4 TTL/ST RB5/SS bit 5 TTL RB6/T1OSO/T1CKI/ bit 6 TTL/ST PGC RB7/T1OSI/PGD bit 7 TTL/ST Legend: TTL = TTL input Schmitt Trigger input Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt ...
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... Note 1: I/O pins have diode protection enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit. 2004 Microchip Technology Inc. Data Latch TRIS Latch TRISB Q EN and PIC16F818/819 V DD Weak P Pull-up (1) I/O pin TTL Input Buffer D RD PORTB DS39598E-page 45 ...
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... PIC16F818/819 FIGURE 5-9: BLOCK DIAGRAM OF RB1 PIN 2 I C™ Mode Port/SSPEN Select SDA Output (2) RBPU Data Latch Data Bus D WR PORTB CK TRIS Latch D WR TRISB CK SDA Drive RD PORTB (3) SDA SDI Note 1: I/O pins have diode protection enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit. ...
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... To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit. 2004 Microchip Technology Inc. Module Select Data Latch TRIS Latch D Q TTL Input CK Buffer RD TRISB PORTB EN RD PORTB and PIC16F818/819 V DD Weak P Pull-up (1) I/O pin DS39598E-page 47 ...
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... PIC16F818/819 FIGURE 5-11: BLOCK DIAGRAM OF RB3 PIN CCP1<M3:M0> = 1000, 1001, 11xx and CCPMX = 0 CCP (2) RBPU Data Latch Data Bus PORTB CK TRIS Latch TRISB CK RD TRISB RD PORTB To PGM or CCP Note 1: I/O pins have diode protection enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit. ...
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... Set RBIF From other RB7:RB4 pins SCK (3) SCL Note 1: I/O pins have diode protection enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit. 3: The SCL Schmitt Trigger conforms to the I 2004 Microchip Technology Inc. PIC16F818/819 Weak P Pull- ...
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... PIC16F818/819 FIGURE 5-13: BLOCK DIAGRAM OF RB5 PIN (2) RBPU Port/SSPEN Data Latch Data Bus WR PORTB TRIS Latch WR TRISB RD TRISB RD PORTB Set RBIF From other RB7:RB4 pins SS Note 1: I/O pins have diode protection enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit. ...
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... Note 1: I/O pins have diode protection enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit. 2004 Microchip Technology Inc. Data Latch TRIS Latch T1OSCEN RD TRISB Input Buffer Latch Q Q and PIC16F818/819 V DD Weak P Pull-up (1) I/O pin TTL PORTB EN Q3 DS39598E-page 51 ...
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... PIC16F818/819 FIGURE 5-15: BLOCK DIAGRAM OF RB7 PIN Port/Program Mode/ICD PGD (2) RBPU Data Bus WR PORTB WR TRISB T1OSCEN PGD DRVEN Set RBIF From other RB7:RB4 pins PGD To T1OSI Input Note 1: I/O pins have diode protection enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit. ...
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... The TMR0 interrupt cannot awaken the processor from Sleep since the timer is shut-off during Sleep Sync Cycles PSA PRESCALER 8-bit Prescaler 8 8-to-1 MUX PS2:PS0 1 0 PSA MUX WDT Time-out PIC16F818/819 Data Bus 8 TMR0 reg Set Flag bit TMR0IF on Overflow DS39598E-page 53 ...
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... PIC16F818/819 6.3 Using Timer0 with an External Clock When no prescaler is used, the external clock input is the same as the prescaler output. The synchronization of T0CKI with the internal phase clocks is accom- plished by sampling the prescaler output on the Q2 and Q4 cycles of the internal phase clocks. Therefore ...
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... INTCON GIE PEIE 10Bh,18Bh 81h,181h OPTION_REG RBPU INTEDG Legend unknown unchanged unimplemented locations read as ‘0’. Shaded cells are not used by Timer0. 2004 Microchip Technology Inc. PIC16F818/819 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 TMR0IE INTE RBIE TMR0IF INTF T0CS T0SE ...
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... PIC16F818/819 NOTES: DS39598E-page 56 2004 Microchip Technology Inc. ...
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... Manual” (DS33023). R/W-0 R/W-0 R/W-0 — T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON /4) OSC W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared PIC16F818/819 ® Mid-Range MCU Family Reference R/W-0 R/W-0 R/W-0 bit Bit is unknown DS39598E-page 57 ...
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... PIC16F818/819 7.2 Timer1 Operation in Timer Mode Timer mode is selected by clearing the TMR1CS (T1CON<1>) bit. In this mode, the input clock to the timer is F /4. The synchronize control bit, T1SYNC OSC (T1CON<2>), has no effect since the internal clock is always in sync. 7.3 Timer1 Counter Operation Timer1 may operate in Asynchronous or Synchronous mode depending on the setting of the TMR1CS bit ...
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... Read low byte MOVWF TMPL ; Re-enable the Interrupt (if required) CONTINUE ; Continue with your code 2004 Microchip Technology Inc. PIC16F818/819 7.5.1 READING AND WRITING TIMER1 IN ASYNCHRONOUS COUNTER MODE Reading TMR1H or TMR1L while the timer is running from an external asynchronous clock will ensure a valid read (taken care of in hardware) ...
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... The oscillator loading capacitors may remain in-circuit during ICSP or ICD operation. FIGURE 7-3: EXTERNAL COMPONENTS FOR THE TIMER1 LP OSCILLATOR C1 PIC16F818/819 33 pF T1OSI XTAL 32.768 kHz T1OSO Note: See the Notes with Table 7-1 for additional information about capacitor selection ...
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... In all other Resets, the register is unaffected. 7.10 Timer1 Prescaler The prescaler counter is cleared on writes to the TMR1H or TMR1L registers. 2004 Microchip Technology Inc. PIC16F818/819 7.11 Using Timer1 as a Real-Time Clock Adding an external LP oscillator to Timer1 (such as the signal one described in Section 7.6 “Timer1 Oscillator”), gives users the option to include RTC functionality in their applications ...
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... PIC16F818/819 EXAMPLE 7-3: IMPLEMENTING A REAL-TIME CLOCK USING A TIMER1 INTERRUPT SERVICE RTCinit BANKSEL TMR1H MOVLW 0x80 MOVWF TMR1H CLRF TMR1L MOVLW b’00001111’ MOVWF T1CON CLRF secs CLRF mins MOVLW .12 MOVWF hours BANKSEL PIE1 BSF PIE1, TMR1IE RETURN RTCisr BANKSEL TMR1H BSF ...
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... FIGURE 8-1: Sets Flag TMR2 bit TMR2IF Output Reset Postscaler 1:1 to 1:16 4 Note 1: TMR2 register output can be software selected by the SSP module as a baud clock. PIC16F818/819 TIMER2 BLOCK DIAGRAM (1) Prescaler TMR2 reg F /4 OSC 1:1, 1:4, 1:16 2 Comparator EQ PR2 reg DS39598E-page 63 ...
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... PIC16F818/819 REGISTER 8-1: T2CON: TIMER2 CONTROL REGISTER (ADDRESS 12h) U-0 R/W-0 — TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 bit 7 bit 7 Unimplemented: Read as ‘0’ bit 6-3 TOUTPS3:TOUTPS0: Timer2 Output Postscale Select bits 0000 = 1:1 Postscale 0001 = 1:2 Postscale 0010 = 1:3 Postscale • ...
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... R/W-0 R/W-0 R/W-0 — CCP1X CCP1Y CCP1M3 W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared PIC16F818/819 ® Mid-Range MCU Family Reference CCP MODE – TIMER RESOURCE Timer Resource Timer1 Timer1 Timer2 R/W-0 R/W-0 R/W-0 ...
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... PIC16F818/819 9.1 Capture Mode In Capture mode, CCPR1H:CCPR1L captures the 16-bit value of the TMR1 register when an event occurs on the CCP1 pin. An event is defined as: • Every falling edge • Every rising edge • Every 4th rising edge • Every 16th rising edge An event is selected by control bits, CCP1M3:CCP1M0 (CCP1CON< ...
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... SSPIF CCP1IF TMR2IF TMR1IF -0-- 0000 -0-- 0000 — — SSPIE CCP1IE TMR2IE TMR1IE -0-- 0000 -0-- 0000 CCP1X CCP1Y CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000 PIC16F818/819 Value on Value on Bit 1 Bit 0 all other POR, BOR Resets INTF RBIF 0000 000x 0000 000u 1111 1111 1111 1111 ...
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... PIC16F818/819 9.3 PWM Mode In Pulse-Width Modulation (PWM) mode, the CCP1 pin produces 10-bit resolution PWM output. Since the CCP1 pin is multiplexed with the PORTB data latch, the TRISB<x> bit must be cleared to make the CCP1 pin an output. Note: Clearing the CCP1CON register will force the CCP1 PWM output latch to the default low level ...
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... Bit 5 Bit 4 Bit 3 Bit 2 TMR0IE INTE RBIE TMR0IF — — SSPIF CCP1IF — — SSPIE CCP1IE CCP1X CCP1Y CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000 PIC16F818/819 setting of configuration bit 0x3F 0x1F 0x17 8 7 5.5 Value on Value on Bit 1 Bit 0 all other POR, BOR ...
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... PIC16F818/819 NOTES: DS39598E-page 70 2004 Microchip Technology Inc. ...
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... Reference (DS33023). Refer to Application Note AN578, “Use of the SSP 2 Module in the I C™ Multi-Master Environment” (DS00578). 2004 Microchip Technology Inc. PIC16F818/819 10.2 SPI Mode This section contains operational characteristics of the SPI module. SPI mode allows 8 bits of data to be synchronously ...
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... PIC16F818/819 REGISTER 10-1: SSPSTAT: SYNCHRONOUS SERIAL PORT STATUS REGISTER (ADDRESS 94h) R/W-0 R/W-0 SMP bit 7 bit 7 SMP: SPI Data Input Sample Phase bit SPI Master mode Input data sampled at end of data output time 0 = Input data sampled at middle of data output time (Microwire) SPI Slave mode: This bit must be cleared when SPI is used in Slave mode ...
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... C Slave mode, 7-bit address with Start and Stop bit interrupts enabled 2 1111 = I C Slave mode, 10-bit address with Start and Stop bit interrupts enabled 1000, 1001, 1010, 1100, 1101 = Reserved Legend Readable bit -n = Value at POR 2004 Microchip Technology Inc. PIC16F818/819 R/W-0 R/W-0 R/W-0 SSPEN CKP SSPM3 SSPM2 ( Writable bit U = Unimplemented bit, read as ‘ ...
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... PIC16F818/819 FIGURE 10-1: SSP BLOCK DIAGRAM (SPI™ MODE) Read SSPBUF reg SSPSR reg RB1/SDI/SDA bit 0 RB2/SDO/ CCP1 SS Control Enable RB5/SS Edge Select 2 Clock Select SSPM3:SSPM0 4 Edge Select RB4/SCK/ SCL TRISB<4> TABLE 10-1: REGISTERS ASSOCIATED WITH SPI™ OPERATION Address Name ...
Page 77
... SSPIF FIGURE 10-4: SPI™ MODE TIMING (SLAVE MODE WITH CKE = 1) SS SCK (CKP = 0) SCK (CKP = 1) SDO bit 7 bit 6 SDI (SMP = 0) bit 7 SSPIF 2004 Microchip Technology Inc. PIC16F818/819 bit 6 bit 5 bit 3 bit 4 bit 6 bit 5 bit 3 bit 4 bit 2 bit 5 bit 4 bit 3 ...
Page 78
... RB1/SDI/SDA pin, which is the data (SDA). The user must configure these pins as inputs or outputs through the TRISB<4,1> bits. EXAMPLE 10-1: MOVF TRISC Example for an 18-pin part such as the PIC16F818/819 IORLW 0x18 ; Ensures <4:3> bits are ‘11’ ANDLW B’11111001’ ; Sets <2:1> as output, but will not alter other bits ...
Page 79
... For a 10-bit address, the first byte would equal ‘1111 0’, where A9 and A8 are the two MSbs of the address. 2004 Microchip Technology Inc. PIC16F818/819 The sequence of events for 10-bit address is as follows, with steps 7-9 for slave-transmitter: 1. Receive first (high) byte of address (bits SSPIF, BF and bit UA (SSPSTAT< ...
Page 80
... PIC16F818/819 An SSP interrupt is generated for each data transfer byte. Flag bit SSPIF must be cleared in software and the SSPSTAT register is used to determine the status of the byte. Flag bit SSPIF is set on the falling edge of the ninth clock pulse slave-transmitter, the ACK pulse from the master- receiver is latched on the rising edge of the ninth SCL input pulse ...
Page 81
... SSPIF CCP1IF TMR2IF TMR1IF — — SSPIE CCP1IE TMR2IE TMR1IE -0-- 0000 -0-- 0000 2 C™ mode) Address Register SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 D R/W PIC16F818/819 2 C bus may be taken when 2 C™ Value on Value on Bit 1 Bit 0 all other POR, BOR Resets INTF ...
Page 82
... PIC16F818/819 NOTES: DS39598E-page 80 2004 Microchip Technology Inc. ...
Page 83
... A/D converter module is shut-off and consumes no operating current Legend Readable bit -n = Value at POR 2003 Microchip Technology Inc. PIC16F818/819 The A/D module has four registers: • A/D Result High Register (ADRESH) • A/D Result Low Register (ADRESL) • A/D Control Register 0 (ADCON0) • ...
Page 84
... PIC16F818/819 REGISTER 11-2: ADCON1: A/D CONTROL REGISTER 1 (ADDRESS 9Fh) R/W-0 R/W-0 ADFM ADCS2 bit 7 bit 7 ADFM: A/D Result Format Select bit 1 = Right justified, 6 Most Significant bits of ADRESH are read as ‘0’ Left justified, 6 Least Significant bits of ADRESL are read as ‘0’ ...
Page 85
... For next conversion step 1 or step 2 as required. The A/D conversion time per bit is defined as T required before the next acquisition starts. CHS<3:0> (Input Voltage PCFG<3:0> PCFG<3:0> PIC16F818/819 . A minimum wait 100 RA4/AN4/T0CKI 011 RA3/AN3/V + REF 010 RA2/AN2/V - REF 001 RA1/AN1 000 ...
Page 86
... PIC16F818/819 11.1 A/D Acquisition Requirements For the A/D converter to meet its specified accuracy, the charge holding capacitor (C ) must be allowed HOLD to fully charge to the input channel voltage level. The analog input model is shown in Figure 11-2. The source impedance (R ) and the internal sampling switch (R ...
Page 87
... Analog levels on any pin that is defined as a digital input (including the AN4:AN0 pins) may cause the input buffer to consume current out of the device specification ADCS<1:0> time but can vary between 2 PIC16F818/819 will be converted Maximum Device Frequency 1.25 MHz 2.5 MHz 5 MHz 10 MHz 20 MHz 20 MHz (Note 1) DS39598D-page 85 ...
Page 88
... PIC16F818/819 11.4 A/D Conversions Clearing the GO/DONE bit during a conversion will abort the current conversion. The A/D Result register pair will NOT be updated with the partially completed A/D conversion sample. That is, the ADRESH:ADRESL registers will continue to contain the value of the last completed conversion (or the last value written to the ADRESH:ADRESL registers) ...
Page 89
... SSPIE CCP1IE TMR2IE TMR1IE -0-- 0000 CHS2 CHS1 CHS0 GO/DONE — — — PCFG3 PCFG2 PCFG1 RA5 RA4 RA3 RA2 RA1 PIC16F818/819 for a Power-on Reset. The bits (CCP1CON<3:0>) be software overhead (moving the Value on Value on Bit 0 all other POR, BOR Resets ...
Page 90
... PIC16F818/819 NOTES: DS39598D-page 88 2003 Microchip Technology Inc. ...
Page 91
... With these two timers on-chip, most applications need no external Reset circuitry. 2004 Microchip Technology Inc. PIC16F818/819 Sleep mode is designed to offer a very low-current power-down mode. The user can wake-up from Sleep through external Reset, Watchdog Timer wake-up or through an interrupt ...
Page 92
... In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins 0 = In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger bit 10-9 WRT1:WRT0: Flash Program Memory Write Enable bits For PIC16F818 Write protection off 10 = 000h to 01FF write-protected, 0200 to 03FF may be modified by EECON control 01 = 000h to 03FF write-protected ...
Page 93
... Reset The PIC16F818/819 differentiates between various kinds of Reset: • Power-on Reset (POR) • MCLR Reset during normal operation • MCLR Reset during Sleep • WDT Reset during normal operation • WDT wake-up during Sleep • Brown-out Reset (BOR) FIGURE 12-1: ...
Page 94
... PIC16F818/819 12.3 MCLR PIC16F818/819 device has a noise filter in the MCLR Reset path. The filter will detect and ignore small pulses. It should be noted that a WDT Reset does not drive MCLR pin low. The behavior of the ESD protection on the MCLR pin has been altered from previous devices of this family. ...
Page 95
... Status Counter Register 000h 0001 1xxx 000h 000u uuuu 000h 0001 0uuu 000h 0000 1uuu uuu0 0uuu 000h 0001 1uuu ( uuu1 0uuu PIC16F818/819 Wake-up from Sleep PWRTE = 1 1024 • T 1024 • T OSC OSC OSC (1) (1) 5-10 s 5-10 s PCON Register ---- --0x ---- --uu ---- --uu ---- --uu ...
Page 96
... PIC16F818/819 TABLE 12-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS Power-on Reset, Register Brown-out Reset W xxxx xxxx INDF TMR0 xxxx xxxx PCL 0000h STATUS 0001 1xxx FSR xxxx xxxx PORTA xxx0 0000 PORTB xxxx xxxx PCLATH ---0 0000 INTCON 0000 000x PIR1 -0-- 0000 PIR2 ...
Page 97
... MCLR Internal POR PWRT Time-out OST Time-out Internal Reset FIGURE 12-5: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED NETWORK): CASE MCLR Internal POR PWRT Time-out OST Time-out Internal Reset 2004 Microchip Technology Inc. PIC16F818/819 T PWRT T OST T PWRT T OST T PWRT T OST THROUGH DD THROUGH ...
Page 98
... Internal POR PWRT Time-out OST Time-out Internal Reset 12.10 Interrupts The PIC16F818/819 has up to nine sources of inter- rupt. The Interrupt Control register (INTCON) records individual interrupt requests in flag bits. It also has individual and global interrupt enable bits. Note: Individual interrupt flag bits are set ...
Page 99
... Typically, users may wish to save key registers during an interrupt (i.e., W, Status registers). This will have to be implemented in software as shown in Example 12-1. For PIC16F818 devices, the upper 64 bytes of each bank are common. Temporary holding registers, W_TEMP and STATUS_TEMP, should be placed here. These 64 locations do not require banking and therefore, make it easier for context save and restore ...
Page 100
... PIC16F818/819 12.12 Watchdog Timer (WDT) For PIC16F818/819 devices, the WDT is driven by the INTRC oscillator. When the WDT is enabled, the INTRC (31.25 kHz) oscillator is enabled. The nominal WDT period and has the same accuracy as the INTRC oscillator. During normal operation, a WDT time-out generates a device Reset (Watchdog Timer Reset) ...
Page 101
... SLEEP instruction, it may be possible for flag bits to become set before the SLEEP instruction completes. To determine whether a SLEEP instruction executed, test the PD bit. If the PD bit is set, the SLEEP instruction was executed as a NOP. To ensure that the WDT is cleared, a CLRWDT instruction should be executed before a SLEEP instruction. 2 C). PIC16F818/819 DS39598E-page 99 ...
Page 102
... PIC16F818/819 FIGURE 12-9: WAKE-UP FROM SLEEP THROUGH INTERRUPT OSC1 (4) CLKO INT pin INTF Flag (INTCON<1>) GIE bit (INTCON<7>) INSTRUCTION FLOW Instruction Inst(PC) = Sleep Inst( Fetched Instruction Sleep Inst(PC – 1) Executed Note 1: XT Oscillator mode assumed 1024 T (drawing not to scale). This delay will not be there for RC Oscillator mode. ...
Page 103
... This also allows the most recent firmware or a custom firmware to be programmed. For more information on serial programming, please refer to the “PIC16F818/819 Flash Memory Programming Specification” (DS39603). Note: The Timer1 oscillator shares the T1OSI and T1OSO pins with the PGD and PGC ...
Page 104
... RB3 should not be allowed to float if LVP is enabled. An external pull-down device should be used to default the device to normal operating mode. If RB3 floats high, the PIC16F818/819 device will enter Programming mode. 5: LVP mode is enabled by default on all devices shipped from Microchip. It can be disabled by clearing the LVP bit in the Configuration Word register ...
Page 105
... NOP. Note: To maintain upward compatibility with future PIC16F818/819 products, do not use the OPTION and TRIS instructions. All instruction examples use the format ‘0xhh’ to represent a hexadecimal number, where ‘h’ signifies a hexadecimal digit ...
Page 106
... PIC16F818/819 TABLE 13-2: PIC16F818/819 INSTRUCTION SET Mnemonic, Description Operands BYTE-ORIENTED FILE REGISTER OPERATIONS ADDWF f, d Add W and f ANDWF f, d AND W with f CLRF f Clear f CLRW - Clear W COMF f, d Complement f DECF f, d Decrement f DECFSZ f, d Decrement f, Skip if 0 INCF f, d Increment f INCFSZ f, d Increment f, Skip if 0 ...
Page 107
... BCF Syntax: f,d Operands: Operation: Status Affected: Description: BSF k Syntax: Operands: Operation: Status Affected: Description: PIC16F818/819 AND W with f [ label ] ANDWF f 127 d [0,1] (W) .AND. (f) (destination) Z AND the W register with register ‘f’. If ‘d’ the result is stored in the W register. If ‘d’ the result is stored back in register ‘ ...
Page 108
... PIC16F818/819 BTFSS Bit Test f, Skip if Set Syntax: [ label ] BTFSS f,b Operands 127 0 b < 7 Operation: skip if (f<b> Status Affected: None Description: If bit ‘b’ in register ‘f’ the next instruction is executed. If bit ‘b’ then the next instruction is discarded and a NOP ...
Page 109
... If the result is ‘1’, the next instruction is executed. If the result is ‘0’, then a NOP is executed instead, making instruction. CY 2004 Microchip Technology Inc. PIC16F818/819 GOTO Unconditional Branch Syntax: [ label ] GOTO k Operands 2047 ...
Page 110
... PIC16F818/819 IORLW Inclusive OR Literal with W Syntax: [ label ] IORLW k Operands 255 Operation: (W) .OR. k (W) Status Affected: Z Description: The contents of the W register are ORed with the eight-bit literal ‘k’. The result is placed in the W register. IORWF Inclusive OR W with f Syntax: [ label ] IORWF Operands: ...
Page 111
... Status Affected: None Description: Return from subroutine. The stack is POPed and the top of the stack (TOS) is loaded into the program counter. This is a two-cycle instruction. 2004 Microchip Technology Inc. PIC16F818/819 RLF Rotate Left f through Carry Syntax: [ label ] RLF f,d Operands: 0 ...
Page 112
... PIC16F818/819 SUBLW Subtract W from Literal Syntax: [ label ] SUBLW k Operands 255 Operation: k – (W) W) Status Affected: C, DC, Z Description: The W register is subtracted (2’s complement method) from the eight-bit literal ‘k’. The result is placed in the W register. SUBWF Subtract W from f Syntax: [ label ] SUBWF f,d ...
Page 113
... Developer Kits - CAN ® - PowerSmart Developer Kits - Analog 2003 Microchip Technology Inc. PIC16F818/819 14.1 MPLAB Integrated Development Environment Software The MPLAB IDE software brings an ease of software development previously unseen in the 8/16-bit micro- controller market. The MPLAB IDE is a Windows based application that contains: • ...
Page 114
... PIC16F818/819 14.3 MPLAB C17 and MPLAB C18 C Compilers The MPLAB C17 and MPLAB C18 Code Development Systems are complete ANSI C compilers for Microchip’s PIC17CXXX and PIC18CXXX family of microcontrollers. These compilers provide powerful integration capabilities, superior code optimization and ease of use not found with other compilers. ...
Page 115
... The PC platform and Microsoft Windows 32-bit operating system were chosen to best make these features available in a simple, unified application. 2003 Microchip Technology Inc. PIC16F818/819 14.11 MPLAB ICD 2 In-Circuit Debugger Microchip’s In-Circuit Debugger, MPLAB ICD powerful, low-cost, ...
Page 116
... PICDEM 4 8/14/18-Pin Demonstration Board The PICDEM 4 can be used to demonstrate the capa- bilities of the 8, 14 and 18-pin PIC16XXXX and PIC18XXXX MCUs, including the PIC16F818/819, PIC16F87/88, PIC16F62XA and the PIC18F1320 family of microcontrollers. PICDEM 4 is intended to showcase the many features of these low pin count parts, including LIN and Motor Control using ECCP ...
Page 117
... PICDEM MSC demo boards for Switching mode power supply, high-power IR driver, delta sigma ADC and flow rate sensor Check the Microchip web page and the latest Product Selector Guide for the complete list of demonstration and evaluation kits. IDE (Integrated ® PIC16F818/819 TM development DS39598D-page 115 ...
Page 118
... PIC16F818/819 NOTES: DS39598D-page 116 2003 Microchip Technology Inc. ...
Page 119
... Exposure to maximum rating conditions for extended periods may affect device reliability. 2004 Microchip Technology Inc. (except V and MCLR) ................................................... -0. (Note 2) .............................................................................................-0.3 to +14V ) .......................................................................................................... ± > ...................................................................................................± – ∑ PIC16F818/819 + 0.3V ∑ {( ∑(V – DS39598E-page 117 ) ...
Page 120
... PIC16F818/819 FIGURE 15-1: PIC16F818/819 VOLTAGE-FREQUENCY GRAPH (INDUSTRIAL, EXTENDED) 6.0V 5.5V 5.0V 4.5V 4.0V 3.5V 3.0V 2.5V 2.0V FIGURE 15-2: PIC16LF818/819 VOLTAGE-FREQUENCY GRAPH (INDUSTRIAL) 6.0V 5.5V 5.0V 4.5V 4.0V 3.5V 3.0V 2.5V 2. (12 MHz/V) (V MAX Note the minimum voltage of the PICmicro DDAPPMIN ...
Page 121
... DC Characteristics: Supply Voltage PIC16F818/819 (Industrial, Extended) PIC16LF818/819 (Industrial) PIC16LF818/819 (Industrial) PIC16F818/819 (Industrial, Extended) Param Symbol Characteristic No. V Supply Voltage DD D001 PIC16LF818/819 D001 PIC16F818/819 D002 V RAM Data Retention DR (1) Voltage D003 V V Start Voltage POR DD to ensure internal Power-on Reset signal ...
Page 122
... PIC16F818/819 15.2 DC Characteristics: Power-Down and Supply Current PIC16F818/819 (Industrial, Extended) PIC16LF818/819 (Industrial) PIC16LF818/819 Standard Operating Conditions (unless otherwise stated) (Industrial) Operating temperature Standard Operating Conditions (unless otherwise stated) PIC16F818/819 Operating temperature (Industrial, Extended) Param Device Typ No. (1) Power-Down Current ( PIC16LF818/819 0.1 ...
Page 123
... DC Characteristics: Power-Down and Supply Current PIC16F818/819 (Industrial, Extended) PIC16LF818/819 (Industrial) (Continued) PIC16LF818/819 Standard Operating Conditions (unless otherwise stated) (Industrial) Operating temperature Standard Operating Conditions (unless otherwise stated) PIC16F818/819 Operating temperature (Industrial, Extended) Param Device Typ No. (2,3) Supply Current ( PIC16LF818/819 PIC16LF818/819 ...
Page 124
... PIC16F818/819 15.2 DC Characteristics: Power-Down and Supply Current PIC16F818/819 (Industrial, Extended) PIC16LF818/819 (Industrial) (Continued) PIC16LF818/819 Standard Operating Conditions (unless otherwise stated) (Industrial) Operating temperature Standard Operating Conditions (unless otherwise stated) PIC16F818/819 Operating temperature (Industrial, Extended) Param Device Typ No. (2,3) Supply Current ( PIC16LF818/819 ...
Page 125
... DC Characteristics: Power-Down and Supply Current PIC16F818/819 (Industrial, Extended) PIC16LF818/819 (Industrial) (Continued) PIC16LF818/819 Standard Operating Conditions (unless otherwise stated) (Industrial) Operating temperature Standard Operating Conditions (unless otherwise stated) PIC16F818/819 Operating temperature (Industrial, Extended) Param Device Typ No. (2,3) Supply Current ( All devices 1 ...
Page 126
... PIC16F818/819 15.2 DC Characteristics: Power-Down and Supply Current PIC16F818/819 (Industrial, Extended) PIC16LF818/819 (Industrial) (Continued) PIC16LF818/819 Standard Operating Conditions (unless otherwise stated) (Industrial) Operating temperature Standard Operating Conditions (unless otherwise stated) PIC16F818/819 Operating temperature (Industrial, Extended) Param Device Typ No. (2,3) Supply Current ( PIC16LF818/819 ...
Page 127
... DC Characteristics: Power-Down and Supply Current PIC16F818/819 (Industrial, Extended) PIC16LF818/819 (Industrial) (Continued) PIC16LF818/819 Standard Operating Conditions (unless otherwise stated) (Industrial) Operating temperature Standard Operating Conditions (unless otherwise stated) PIC16F818/819 Operating temperature (Industrial, Extended) Param Device Typ No. (2,3) Supply Current ( PIC16LF818/819 .950 ...
Page 128
... PIC16F818/819 15.2 DC Characteristics: Power-Down and Supply Current PIC16F818/819 (Industrial, Extended) PIC16LF818/819 (Industrial) (Continued) PIC16LF818/819 Standard Operating Conditions (unless otherwise stated) (Industrial) Operating temperature Standard Operating Conditions (unless otherwise stated) PIC16F818/819 Operating temperature (Industrial, Extended) Param Device Typ No. D022 Module Differential Currents ( I ...
Page 129
... The only specification difference between a non-TSL device and a TSL device is the internal RC oscillator specifications listed above. All other specifications are maintained. 4: Example part number for the specifications listed above: PIC16F818-I/SS (PIC16F818 device, Industrial temperature, SSOP package). 5: Example part number for the specifications listed above: PIC16F818-I/SSTSL (PIC16F818 device, Industrial temperature, SSOP package). ...
Page 130
... Note oscillator configuration, the OSC1/CLKI pin is a Schmitt Trigger input not recommended that the PIC16F818/819 be driven with external clock in RC mode. 2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions ...
Page 131
... Note oscillator configuration, the OSC1/CLKI pin is a Schmitt Trigger input not recommended that the PIC16F818/819 be driven with external clock in RC mode. 2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions ...
Page 132
... PIC16F818/819 15.5 Timing Parameter Symbology The timing parameter symbols have been created using one of the following formats: 1. TppS2ppS 2. TppS T F Frequency Lowercase letters (pp) and their meanings CCP1 ck CLKO SDI do SDO dt Data in io I/O port mc MCLR Uppercase letters and their meanings Fall ...
Page 133
... All specified values PIC16F818/819 Units Conditions MHz XT and RC Oscillator mode MHz HS Oscillator mode kHz LP Oscillator mode MHz RC Oscillator mode MHz XT Oscillator mode MHz ...
Page 134
... Min — — — — — 200 OSC 0 — PIC16F818/819 100 PIC16LF818/819 200 (I/O in setup time) 0 PIC16F818/819 — PIC16LF818/819 — PIC16F818/819 — PIC16LF818/819 — OSC New Value Typ† Max Units Conditions 75 200 ns (Note 1) 75 200 ns (Note 1) 35 100 ns (Note 1) ...
Page 135
... Brown-out Reset Pulse Width BOR * These parameters are characterized but not tested. † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. 2004 Microchip Technology Inc. PIC16F818/819 BOR 35 Min Typ† ...
Page 136
... CY PIC16F818/819 15 — PIC16LF818/819 25 — PIC16F818/819 30 — PIC16LF818/819 50 — 0 — CY PIC16F818/819 15 — PIC16LF818/819 25 — PIC16F818/819 30 — PIC16LF818/819 50 — PIC16F818/819 Greater of: — PIC16LF818/819 Greater of PIC16F818/819 60 — PIC16LF818/819 100 — DC — 32.768 kHz 2 T — OSC 2004 Microchip Technology Inc. 48 Max Units Conditions — ...
Page 137
... Microchip Technology Inc. PIC16F818/819 Min Typ† Max Units 0 PIC16F818/819 PIC16F818/819 PIC16F818/819 — PIC16LF818/819 — PIC16F818/819 — PIC16LF818/819 — Conditions — — ns — — ns — — ns — — ns — — ns — — ns — — prescale value (1,4 or 16) 10 ...
Page 138
... PIC16F818/819 FIGURE 15-10: SPI™ MASTER MODE TIMING (CKE = 0, SMP = SCK (CKP = 0) 71 SCK (CKP = 1) 80 SDO SDI MSb In 73 Note: Refer to Figure 15-3 for load conditions. FIGURE 15-11: SPI™ MASTER MODE TIMING (CKE = 1, SMP = SCK (CKP = SCK (CKP = 1) SDO ...
Page 139
... SPI™ SLAVE MODE TIMING (CKE = SCK (CKP = 0) 71 SCK (CKP = 1) MSb SDO SDI SDI MSb In 74 Note: Refer to Figure 15-3 for load conditions. 2004 Microchip Technology Inc Bit MSb 75, 76 MSb In Bit Bit LSb 75, 76 Bit LSb In PIC16F818/819 LSb 77 LSb DS39598E-page 137 ...
Page 140
... Note: Refer to Figure 15-3 for load conditions. DS39598E-page 138 Characteristic Min Input 100 100 PIC16F818/819 — PIC16LF818/819 — — 10 PIC16F818/819 — PIC16LF818/819 — — PIC16F818/819 — PIC16LF818/819 — T Edge — 1 Typ† Max Units Conditions — — — — — — ...
Page 141
... PIC16F818/819 Units Conditions ns Only relevant for Repeated Start condition ns After this period, the first clock pulse is generated ns ns 102 92 110 DS39598E-page 139 ...
Page 142
... PIC16F818/819 2 TABLE 15-8: I C™ BUS DATA REQUIREMENTS Param. Symbol Characteristic No. 100* T Clock High Time HIGH 101* T Clock Low Time LOW 102* T SDA and SCL Rise R Time 103* T SDA and SCL Fall F Time 90 Start Condition SU STA Setup Time 91 Start Condition Hold ...
Page 143
... TABLE 15-9: A/D CONVERTER CHARACTERISTICS: PIC16F818/819 (INDUSTRIAL, EXTENDED) Param Sym Characteristic No. A01 N Resolution R A03 E Integral Linearity Error IL A04 E Differential Linearity Error DL A06 E Offset Error OFF A07 E Gain Error GN A10 — Monotonicity A20 V Reference Voltage (V + – V REF REF A21 V + Reference Voltage High ...
Page 144
... OLD_DATA Sampling Stopped is added before the A/D clock starts. This allows the SLEEP CY Min Typ† Max PIC16F818/819 1.6 — PIC16LF818/819 3.0 — PIC16F818/819 2.0 4.0 6.0 PIC16LF818/819 3.0 6.0 9.0 — 12 (Note 2) 40 10* — — § OSC cycle. ...
Page 145
... Microchip Technology Inc. vs. F OVER V (HS MODE) OSC (MHz) OSC vs. F OVER V (HS MODE) OSC (MHz) OSC PIC16F818/819 5.5V 5.0V 4.5V 4.0V 3.5V 3.0V 2.5V 2. 5.5V 5.0V 4.5V 4.0V 3.5V 3.0V 2.5V 2. DS39598E-page 143 ...
Page 146
... PIC16F818/819 FIGURE 16-3: TYPICAL I DD 1.8 Typical: statistical mean @ 25°C 1.6 Maximum: mean + 3 (-40°C to +125°C) Minimum: mean – 3 (-40°C to +125°C) 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0 500 1000 FIGURE 16-4: MAXIMUM I DD 2.5 Typical: statistical mean @ 25°C Maximum: mean + 3 (-40° ...
Page 147
... Microchip Technology Inc. vs. F OVER V (LP MODE) OSC (kHz) OSC vs. F OVER V (LP MODE) OSC (kHz) OSC PIC16F818/819 5.5V 5.0V 4.5V 4.0V 3.5V 3.0V 2.5V 2. 100 5.5V 5.0V 4.5V 4.0V 3.5V 3.0V 2.5V 2. 100 DS39598E-page 145 ...
Page 148
... PIC16F818/819 FIGURE 16-7: TYPICAL I DD (RC_RUN MODE, ALL PERIPHERALS DISABLED) 1.6 Typical: statistical mean @ 25°C 1.4 Maximum: mean + 3 (-40°C to +125°C) Minimum: mean – 3 (-40°C to +125°C) 1.2 1.0 0.8 0.6 0.4 0.2 0.0 1.0 2.0 FIGURE 16-8: MAXIMUM I ...
Page 149
... Maximum: mean + 3 (-40°C to +125°C) Minimum: 3.0 3.5 4.0 V (V) DD vs. V FOR VARIOUS VALUES OF R (RC MODE pF, + 3.5 4.0 V (V) DD PIC16F818/819 statistical mean @ 25°C mean – 3 (-40°C to +125°C) 4.5 5.0 5.5 5.1 kOhm 10 kOhm 100 kOhm 4.5 5.0 5.5 DS39598E-page 147 ...
Page 150
... PIC16F818/819 FIGURE 16-11: AVERAGE F OSC (RC MODE 100 pF, +25 C) 2.5 2.0 1.5 1.0 0.5 0.0 2.0 2.5 FIGURE 16-12: AVERAGE F OSC (RC MODE 300 pF, +25 C) 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 2.0 2.5 DS39598E-page 148 vs. V FOR VARIOUS VALUES ...
Page 151
... Maximum: mean + 3 (-40°C to +125°C) Minimum: 3.0 3.5 4.0 V (V) DD Max (-40°C to +125°C) Max (-40°C to +85°C) Typ (25°C) 3.0 3.5 4.0 V (V) DD PIC16F818/819 statistical mean @ 25°C mean – 3 (-40°C to +125°C) 4.5 5.0 5.5 4.5 5.0 5.5 DS39598E-page 149 ...
Page 152
... PIC16F818/819 FIGURE 16-15: I BOR vs BOR ENABLED AT 2.00V-2.16V) 1,000 Max (125°C) Typ (25°C) Device in Reset 100 Note: Device current in Reset depends on oscillator mode, frequency and circuit. Typical: statistical mean @ 25°C Maximum: mean + 3 (-40°C to +125°C) Minimum: mean – 3 (-40°C to +125° ...
Page 153
... FIGURE 16-18: TYPICAL, MINIMUM AND MAXIMUM V 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 2004 Microchip Technology Inc. PIC16F818/819 vs (-mA Typical: statistical mean @ 25°C Maximum: mean + 3 (-40°C to +125°C) Minimum: mean – 3 (-40°C to +125°C) Max Typ (25° ...
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... PIC16F818/819 FIGURE 16-19: TYPICAL, MINIMUM AND MAXIMUM V 1.0 0.9 Typical: statistical mean @ 25°C 0.8 Maximum: mean + 3 (-40°C to +125°C) Minimum: mean – 3 (-40°C to +125°C) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 FIGURE 16-20: TYPICAL, MINIMUM AND MAXIMUM V 3.0 Typical: statistical mean @ 25° ...
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... V (TTL INPUT, - +125 Max (-40° Typ (25° Min (125°C) TH 3.0 3.5 4.0 V (V) DD vs. V (ST INPUT, - +125 3.5 4.0 V (V) DD PIC16F818/819 4.5 5.0 5.5 Max (125°C) IH Min (-40° Max (-40° Min (125°C) IL 4.5 5.0 5.5 DS39598E-page 153 ...
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... PIC16F818/819 FIGURE 16-23: MINIMUM AND MAXIMUM V 3.5 Typical: statistical mean @ 25°C Maximum: mean + 3 (-40°C to +125°C) 3.0 Minimum: mean – 3 (-40°C to +125°C) 2.5 2.0 V Max V IL Max IL 1.5 1.0 V Min IL 0.5 0.0 2.0 2.5 3.0 FIGURE 16-24: A/D NONLINEARITY vs ...
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... FIGURE 16-25: A/D NONLINEARITY vs 2.5 2 1 2.5 2004 Microchip Technology Inc. PIC16F818/819 (V = 5V, - +125 C) REFH DD Max (-40°C to +125°C) Max (-40C to 125C) Typ (+25°C) Typ (25C (V) REFH 4.5 5 5.5 DS39598E-page 155 ...
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... PIC16F818/819 NOTES: DS39598E-page 156 2004 Microchip Technology Inc. ...
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... For PICmicro device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. 2004 Microchip Technology Inc. PIC16F818/819 Example PIC16F818-I/P 0410017 Example PIC16F818-04 /SO 0410017 ...
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... PIC16F818/819 18-Lead Plastic Dual In-line (P) – 300 mil Body (PDIP Dimension Limits Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing § ...
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... L .016 .033 .050 .009 .011 .012 B .014 .017 .020 PIC16F818/819 A2 MILLIMETERS MIN NOM MAX 18 1.27 2.36 2.50 2.64 2.24 2.31 2.39 0.10 0.20 0.30 10.01 10.34 10.67 7.39 7.49 7.59 11.33 11.53 11.73 0.25 0.50 ...
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... PIC16F818/819 20-Lead Plastic Shrink Small Outline (SS) – 209 mil Body, 5.30 mm (SSOP Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Lead Thickness Foot Angle Lead Width *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" ...
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... REF E .232 .236 .240 E2 .140 .146 .152 D .232 .236 .240 D2 .140 .146 .152 b .009 .011 .013 L .020 .024 .028 PIC16F818/819 MILLIMETERS* MIN NOM MAX 28 0.65 BSC 0.80 0.90 1.00 0.00 0.02 0.05 0.20 REF 5.90 6.00 6.10 3.55 3.70 3.85 5.90 6 ...
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... PIC16F818/819 NOTES: DS39598E-page 162 2004 Microchip Technology Inc. ...
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... Timer1 specifications and RTC application example. APPENDIX B: DEVICE DIFFERENCES The differences between the devices in this data sheet are listed in Table B-1. TABLE B-1: DIFFERENCES BETWEEN THE PIC16F818 AND PIC16F819 Features Flash Program Memory (14-bit words) Data Memory (bytes) EEPROM Data Memory (bytes) ...
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... PIC16F818/819 NOTES: DS39598E-page 164 2004 Microchip Technology Inc. ...
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... MPASM Assembler .................................................. 111 B BF Bit ................................................................................. 77 Block Diagrams A/D ............................................................................. 83 Analog Input Model .................................................... 84 Capture Mode Operation ........................................... 66 Compare Mode Operation ......................................... 67 In-Circuit Serial Programming Connections ..................................................... 101 Interrupt Logic ............................................................ 96 On-Chip Reset Circuit ................................................ 91 PIC16F818/819 ............................................................ 6 PWM .......................................................................... 68 RA0/AN0:RA1/AN1 Pins ............................................ 40 RA2/AN2/V - Pin .................................................... 40 REF RA3/AN3/V + Pin ................................................... 40 REF RA4/AN4/T0CKI Pin ................................................... 40 RA5/MCLR/V Pin ................................................... 41 PP RA6/OSC2/CLKO Pin ...
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... Write Interrupt Enable Flag (EEIF Bit) ........................ 25 Writing ........................................................................ 27 Data Memory Special Function Registers ........................................ 13 DC and AC Characteristics Graphs and Tables ................................................... 143 DC Characteristics Internal RC Accuracy ............................................... 127 PIC16F818/819, PIC16LF818/819 ........................... 128 Power-Down and Supply Current ............................. 120 Supply Voltage ......................................................... 119 Demonstration Boards PICDEM 1 ................................................................ 114 PICDEM 17 .............................................................. 115 PICDEM 18R ............................................................ 115 PICDEM 2 Plus ........................................................ 114 PICDEM 3 ...
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... PCL Register .................................................... 13, 14, 15, 23 PCLATH Register ............................................. 13, 14, 15, 23 PCON Register .................................................................. 93 POR Bit ...................................................................... 22 PICkit 1 Flash Starter Kit ................................................. 115 PICSTART Plus Development Programmer ............................................................. 114 Pinout Descriptions PIC16F818/819 ........................................................... 7 Pointer, FSR ...................................................................... 23 POP ................................................................................... 23 POR. See Power-on Reset. PORTA ................................................................................ 7 Associated Register Summary .................................. 39 Functions ................................................................... 39 PORTA Register ........................................................ 39 TRISA Register .......................................................... 39 PORTA Register ...
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... RB4/SCK/SCL Pin ................................................................ 8 RB5/SS Pin .......................................................................... 8 RB6/T1OSO/T1CKI/PGC Pin ............................................... 8 RB7/T1OSI/PGD Pin ............................................................ 8 RBIF Bit .............................................................................. 43 RCIO Oscillator Mode ........................................................ 35 Receive Overflow Indicator Bit, SSPOV ............................. 73 Register File Map PIC16F818 ................................................................. 11 PIC16F819 ................................................................. 12 DS39598E-page 168 Registers ADCON0 (A/D Control 0) ........................................... 81 ADCON1 (A/D Control 1) ........................................... 82 CCP1CON (Capture/Compare/ PWM Control 1) ................................................. 65 Configuration Word .................................................... 90 EECON1 (Data EEPROM Access Control 1) ...
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... Output ........................................................................ 63 Postscaler .................................................................. 63 Prescaler .................................................................... 63 Prescaler and Postscaler ........................................... 63 Timing Diagrams A/D Conversion ........................................................ 142 Brown-out Reset ...................................................... 133 Capture/Compare/PWM (CCP1) .............................. 135 CLKO and I/O .......................................................... 132 External Clock .......................................................... 131 2004 Microchip Technology Inc. PIC16F818/819 Bus Data ............................................................ 139 Bus Start/Stop Bits ............................................ 138 Reception (7-Bit Address) ................................... Transmission (7-Bit Address) ...
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... PIC16F818/819 NOTES: DS39598E-page 170 2004 Microchip Technology Inc. ...
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... Microchip’s development systems software products. Plus, this line provides information on how customers ® ® can receive the most current upgrade kits. The Hot Line or Microsoft Numbers are: 1-800-755-2345 for U.S. and most of Canada, and 1-480-792-7302 for the rest of the world. PIC16F818/819 042003 DS39598E-page 171 ...
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... Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y Device: PIC16F818/819 Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs you find the organization of this document easy to follow? If not, why? 4 ...
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... QTP, SQTP, ROM Code (factory specified) or Special Requirements. Blank for OTP and Windowed devices. 2004 Microchip Technology Inc. XXX Examples: Pattern a) PIC16LF818-I/P = Industrial temp., PDIP package, Extended V b) PIC16F818-I/SO = Industrial temp., SOIC package, normal V range DD range DD Note 1: 2: PIC16F818/819 limits. DD limits ...
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... Fax: 65-6334-8850 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Taiwan - Hsinchu Tel: 886-3-572-9526 Fax: 886-3-572-6459 2004 Microchip Technology Inc. EUROPE Austria - Weis Tel: 43-7242-2244-399 Fax: 43-7242-2244-393 Denmark - Ballerup Tel: 45-4420-9895 Fax: 45-4420-9910 France - Massy Tel: 33-1-69-53-63-20 ...