PIC16F818-I/P Microchip Technology, PIC16F818-I/P Datasheet - Page 108

• Manufacturer Part Number: PIC16F818-I/P
• Description: IC MCU FLASH 1KX14 18-DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F818-I/P

• Program Memory Type: FLASH
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 18-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: I2C/SPI/SSP
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ACICE0202 - ADAPTER MPLABICE 18P 300 MILAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F818/819
BTFSS
Syntax:
Operands:
Operation:
Status Affected:
Description:
BTFSC
Syntax:
Operands:
Operation:
Status Affected:
Description:
CALL
Syntax:
Operands:
Operation:
Status Affected:
Description:
DS39598E-page 106
Bit Test f, Skip if Set
[ label ] BTFSS f,b
0
0
skip if (f<b>) = 1
None
If bit ‘b’ in register ‘f’ = 0, the next
instruction is executed.
If bit ‘b’ = 1, then the next
instruction is discarded and a NOP
is executed instead, making this a
2 T
Bit Test, Skip if Clear
[ label ] BTFSC f,b
0
0
skip if (f<b>) = 0
None
If bit ‘b’ in register ‘f’ = 1, the next
instruction is executed.
If bit ‘b’ in register ‘f’ = 0, the next
instruction is discarded and a NOP
is executed instead, making this a
2 T
Call Subroutine
[ label ] CALL k
0
(PC) + 1
k
(PCLATH<4:3>)
None
Call subroutine. First, return
address (PC + 1) is pushed onto
the stack. The eleven-bit
immediate address is loaded into
PC bits<10:0>. The upper bits of
the PC are loaded from PCLATH.
CALL is a two-cycle instruction.
CY
CY
f
b
f
b < 7
k
PC<10:0>,
instruction.
instruction.
127
127
7
2047
TOS,
PC<12:11>
CLRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
CLRW
Syntax:
Operands:
Operation:
Status Affected:
Description:
CLRWDT
Syntax:
Operands:
Operation:
Status Affected:
Description:
Clear W
[ label ] CLRW
None
00h
1
Z
W register is cleared. Zero bit (Z)
is set.
Clear Watchdog Timer
[ label ] CLRWDT
None
00h
0
1
1
TO, PD
CLRWDT instruction resets the
Watchdog Timer. It also resets the
prescaler of the WDT. Status bits
TO and PD are set.
Clear f
[ label ] CLRF
0
00h
1
Z
The contents of register ‘f’ are
cleared and the Z bit is set.
f
Z
WDT prescaler,
TO
PD
 2004 Microchip Technology Inc.
Z
127
(W)
WDT
(f)
f