PIC16F818-I/P Microchip Technology, PIC16F818-I/P Datasheet - Page 32

IC MCU FLASH 1KX14 18-DIP

PIC16F818-I/P

Manufacturer Part Number
PIC16F818-I/P
Description
IC MCU FLASH 1KX14 18-DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F818-I/P

Program Memory Type
FLASH
Program Memory Size
1.75KB (1K x 14)
Package / Case
18-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
I2C/SPI/SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
Minimum Operating Temperature
- 40 C
On-chip Adc
5-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ACICE0202 - ADAPTER MPLABICE 18P 300 MILAC164010 - MODULE SKT PROMATEII DIP/SOIC
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F818-I/P
Manufacturer:
Microchip Technology
Quantity:
295
PIC16F818/819
3.7
Flash program memory may only be written to if the
destination address is in a segment of memory that is
not write-protected, as defined in bits WRT1:WRT0 of
the device Configuration Word (Register 12-1). Flash
program memory must be written in four-word blocks.
A block consists of four words with sequential
addresses, with a lower boundary defined by an
address, where EEADR<1:0> = 00. At the same time,
all block writes to program memory are done as write-
only operations. The program memory must first be
erased. The write operation is edge-aligned and cannot
occur across boundaries.
To write to the program memory, the data must first be
loaded into the buffer registers. There are four 14-bit
buffer registers and they are addressed by the low
2 bits of EEADR.
The following sequence of events illustrate how to
perform a write to program memory:
• Set the EEPGD and WREN bits in the EECON1
• Clear the FREE bit in EECON1
• Write address to EEADRH:EEADR
• Write data to EEDATH:EEDATA
• Write 55 to EECON2
• Write AA to EECON2
• Set WR bit in EECON 1
FIGURE 3-1:
DS39598E-page 30
EEADR<1:0> = 00
register
Writing to Flash Program Memory
First word of block
to be written
Buffer Register
BLOCK WRITES TO FLASH PROGRAM MEMORY
14
EEADR<1:0> = 01
7
Buffer Register
5
EEDATH
6
14
Program Memory
EEADR<1:0> = 10
0 7
The user must follow the same specific sequence to
initiate the write for each word in the program block by
writing each program word in sequence (00, 01, 10,
11).
There are 4 buffer register words and all four locations
MUST be written to with correct data.
After
EEADR
This short write-only transfers the data to the buffer
register. The WR bit will be cleared in hardware after
one cycle.
After
EEADR = xxxxxx11, then a long write will occur. This
will
EEDATH:EEDATA to the buffer registers and begin the
write of all four words. The processor will execute the
next instruction and then ignore the subsequent
instruction. The user should place NOP instructions into
the second words. The processor will then halt internal
operations for typically 2 msec in which the write takes
place. This is not a Sleep mode, as the clocks and
peripherals will continue to run. After the write cycle,
the processor will resume operation with the 3rd
instruction after the EECON1 write instruction.
After each long write, the 4 buffer registers will be reset
to 3FFF.
simultaneously
the
the
EEDATA
Buffer Register
xxxxxx11, then a short write will occur.
“BSF
“BSF
8
14
EEADR<1:0> = 11
EECON1,
EECON1,
0
 2004 Microchip Technology Inc.
transfer
WR”
WR”
Buffer Register
the
All buffers are
to Flash
automatically
after this word
is written
transferred
instruction,
instruction,
data
14
from
if
if

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